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VIPER013XSTR

STMicroelectronics · AC-DC Controllers And Regulators · SOP-10

VIPER013XSTR from STMicroelectronics, in a SOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground and source of the internal MOSFET and return of the device bias current; bias component grounds must be tied to a trace to this pin, separate from the pulsed current return.
2 VCC power_in Controller supply (operating range 4.5 V to 30 V) needing an external storage capacitor to GND, and charged by the internal HV current source at startup and in self-supply mode, with a 0.1 µF typ. bypass capacitor recommended.
3 DIS input Disable input that disables the PWM in auto-restart mode if above VDIS_th (1.2 V typ.) for more than tDEB (1 ms typ.), usable for input or output overvoltage protection via a divider, and must be soldered to GND if unused.
4 FB input Inverting input of the internal transconductance E/A referenced internally to 1.2 V with respect to GND, fed from the output voltage divider (or from VCC divider in primary regulation), and the E/A is disabled by soldering FB to GND.
5 COMP output Output of the internal E/A for the compensation network to GND, and in secondary feedback with E/A disabled it is driven directly by the optocoupler to set the DRAIN peak current setpoint.
6 DRAIN passive MOSFET drain (800 V rated) where the internal HV current source sinks current to charge the VCC capacitor, connected to the internal MOSFET metal pad with PCB copper area needed for heat dissipation.
7 DRAIN passive MOSFET drain (800 V rated) where the internal HV current source sinks current to charge the VCC capacitor, connected to the internal MOSFET metal pad with PCB copper area needed for heat dissipation.
8 DRAIN passive MOSFET drain (800 V rated) where the internal HV current source sinks current to charge the VCC capacitor, connected to the internal MOSFET metal pad with PCB copper area needed for heat dissipation.
9 DRAIN passive MOSFET drain (800 V rated) where the internal HV current source sinks current to charge the VCC capacitor, connected to the internal MOSFET metal pad with PCB copper area needed for heat dissipation.
10 DRAIN passive MOSFET drain (800 V rated) where the internal HV current source sinks current to charge the VCC capacitor, connected to the internal MOSFET metal pad with PCB copper area needed for heat dissipation.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SOP-10
Category Power Management (PMIC)
Pins 10

CAD (KiCad official)

  • Symbol: VIPER013XSTR
  • Footprint: Package_SO:SOIC-10_3.9x4.9mm_P1mm
  • 3D model: SOP-10, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.75 mm nominal SOIC height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: viper013xstr-etched.step / viper013xstr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); viper013xstr.step / viper013xstr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (36 pp, sha256 6327df47bb70293b, retrieved 2026-10-12, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF