component
VIPER012XSTR
Public Made by Adomby adom
STMicroelectronics AC-DC Controllers And Regulators, SOP-10. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 21h ago |
| viewers | 21h ago |
| package.json | 21h ago |
| page.json | 21h ago |
| README.md | 21h ago |
| verification.json | 21h ago |
| viper012xstr-etched.glb | 21h ago |
| viper012xstr-etched.step | 21h ago |
| viper012xstr-hero.glb | 21h ago |
| viper012xstr-hero.overlay.json | 21h ago |
| viper012xstr.glb | 21h ago |
| viper012xstr.kicad_mod | 21h ago |
| viper012xstr.kicad_sym | 21h ago |
| viper012xstr.lbr | 21h ago |
| viper012xstr.step | 21h ago |
VIPER012XSTR
STMicroelectronics · AC-DC Controllers And Regulators · SOP-10
VIPER012XSTR from STMicroelectronics, in a SOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground and source of the internal MOSFET and return of the device bias current; bias component grounds must be tied to a trace going to this pin, separate from the pulsed current return. |
| 2 | VCC | power_in | Controller supply with an external storage capacitor to GND, fed by the internal high voltage current source for startup charging and self-supply mode, operating range 4.5 V to 30 V, with a 0.1 µF typ. bypass capacitor recommended. |
| 3 | DIS | input | Disable input that stops the PWM in auto-restart mode if its voltage exceeds VDIS_th (1.2 V typ.) for more than tDEB (1 ms typ.), and must be soldered to GND if the function is not required. |
| 4 | FB | input | Direct feedback, inverting input of the internal transconductance E/A referenced internally to 1.2 V with respect to GND, and the E/A is disabled by soldering FB to GND. |
| 5 | COMP | bidirectional | Output of the internal E/A, where the compensation network to GND is placed, and which is driven directly by the optocoupler to set the DRAIN peak current in secondary feedback with the E/A disabled. |
| 6 | DRAIN | passive | MOSFET drain, 800 V rated, which sinks the internal high voltage current source to charge the VCC capacitor and is connected to the internal metal pad, so copper area under these pins aids heat dissipation. |
| 7 | DRAIN | passive | MOSFET drain, 800 V rated, which sinks the internal high voltage current source to charge the VCC capacitor and is connected to the internal metal pad, so copper area under these pins aids heat dissipation. |
| 8 | DRAIN | passive | MOSFET drain, 800 V rated, which sinks the internal high voltage current source to charge the VCC capacitor and is connected to the internal metal pad, so copper area under these pins aids heat dissipation. |
| 9 | DRAIN | passive | MOSFET drain, 800 V rated, which sinks the internal high voltage current source to charge the VCC capacitor and is connected to the internal metal pad, so copper area under these pins aids heat dissipation. |
| 10 | DRAIN | passive | MOSFET drain, 800 V rated, which sinks the internal high voltage current source to charge the VCC capacitor and is connected to the internal metal pad, so copper area under these pins aids heat dissipation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOP-10 |
| Category | Power Management (PMIC) |
| Pins | 10 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | capacitor at startup and during steady-state operation. These pins are mechanically connected to the internal metal PAD of the MOSFET to help heat dissipation. On the PCB, copper area m | 2 |
CAD (KiCad official)
- Symbol:
VIPER012XSTR - Footprint:
Package_SO:SOIC-10_3.9x4.9mm_P1mm - 3D model: SOP-10, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.75 mm nominal SOIC height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
viper012xstr-etched.step/viper012xstr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);viper012xstr.step/viper012xstr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (36 pp, sha256
6327df47bb70293b, retrieved 2026-11-06, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).