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VIPER012LS

Public Made by Adom

by adom

STMicroelectronics AC-DC Controllers And Regulators, SSOP-10. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
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README.md Publish 0.1.0 · Ray 29d ago
viper012ls-etched.glb viper012ls: factory component page (tier=lcsc) · Ray 29d ago
viper012ls-etched.step viper012ls: factory component page (tier=lcsc) · Ray 29d ago
viper012ls-hero.glb viper012ls: hero GLB from the etched model (keeps the MPN mark) · Ray 29d ago
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VIPER012LS

STMicroelectronics · AC-DC Controllers And Regulators · SSOP-10

VIPER012LS from STMicroelectronics, in a SSOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground and MOSFET source, returning the device bias current; all bias-component groundings must tie to a trace to this pin, kept separate from the pulsed current return.
2 VCC power_in Controller supply pin, internally limited with a pulsed Zener current of 45 mA max, requiring an external storage capacitor to GND plus a recommended 0.1 µF bypass capacitor placed close to the IC.
3 DIS input Disable input: the PWM is disabled in auto-restart mode when the voltage exceeds VDIS_th of 1.2 V typ. for tDEB of 1 ms typ., with VDIS limited to -0.3 V to 4.25 V; tie to GND to disable the function.
4 FB input Direct feedback input to the inverting transconductance E/A, internally referenced to 1.2 V with respect to GND, with VFB limited to -0.3 V to 4.25 V; tie to GND to disable the E/A.
5 COMP passive Output of the internal E/A that requires a compensation network to GND for loop stability, with VCOMP limited to -0.3 V to 5.25 V; it is directly driven by the optocoupler in secondary feedback.
6 DRAIN passive MOSFET drain (pins 6 to 10, mechanically tied to the internal metal pad) rated for 800 V VDS and 2 A pulsed IDRAIN max, with copper area under these pins required for heat dissipation.
7 DRAIN passive MOSFET drain (pins 6 to 10, mechanically tied to the internal metal pad) rated for 800 V VDS and 2 A pulsed IDRAIN max, with copper area under these pins required for heat dissipation.
8 DRAIN passive MOSFET drain (pins 6 to 10, mechanically tied to the internal metal pad) rated for 800 V VDS and 2 A pulsed IDRAIN max, with copper area under these pins required for heat dissipation.
9 DRAIN passive MOSFET drain (pins 6 to 10, mechanically tied to the internal metal pad) rated for 800 V VDS and 2 A pulsed IDRAIN max, with copper area under these pins required for heat dissipation.
10 DRAIN passive MOSFET drain (pins 6 to 10, mechanically tied to the internal metal pad) rated for 800 V VDS and 2 A pulsed IDRAIN max, with copper area under these pins required for heat dissipation.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SSOP-10
Category Power Management (PMIC)
Pins 10

CAD (KiCad official)

  • Symbol: VIPER012LS
  • Footprint: Package_SO:SSOP-10_3.9x4.9mm_P1.00mm
  • 3D model: SSOP-10 (KiCad packages3D, STEP)
  • 3D model files: viper012ls-etched.step / viper012ls-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); viper012ls.step / viper012ls.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (36 pp, sha256 6327df47bb70293b, retrieved 2026-10-10, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF