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docs vca810aidr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 4d ago
viewers vca810aidr: viewers · Ray 26d ago
package.json Publish 0.1.0 · Ray 26d ago
page.json Brief states the pinout check that actually ran (was an unconditional "Datasheet-verified pinout") · Ray 11d ago
README.md vca810aidr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 14d ago
vca810aidr-etched.fit.json vca810aidr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 4d ago
vca810aidr-etched.glb vca810aidr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 4d ago
vca810aidr-etched.step vca810aidr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 4d ago
vca810aidr.glb Publish 0.1.0 · Ray 26d ago
vca810aidr.kicad_mod Publish 0.1.0 · Ray 26d ago
vca810aidr.kicad_sym Publish 0.1.0 · Ray 26d ago
vca810aidr.lbr Publish 0.1.0 · Ray 26d ago
vca810aidr.step Publish 0.1.0 · Ray 26d ago

VCA810AIDR

Texas Instruments · Gate Drivers · SOIC-8

VCA810AIDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 +In input Noninverting analog input to the differential input stage. High-impedance input; common-mode range set by ±VS rails.
2 GND power_in Ground reference. Serves as the 0-V reference for the gain-control pin (VC) and the single-ended output.
3 VC input Gain control input. High-impedance analog input; 0 V => -40 dB, -2 V => +40 dB (40 dB/V slope). Voltages above ground attenuate the signal path to > 80 dB.
4 NC unconnected No internal connection. Leave floating or tie to ground per layout preference.
5 VOUT output Single-ended output referenced to GND. ±1.7-V output swing, ±60-mA drive capability, capable of driving doubly-terminated 50-Ω lines.
6 +VS power_in Positive supply rail. Nominal +5 V; operating range +4 V to +5.5 V (absolute max ±6.5 V total). Bypass with local decoupling capacitors.
7 -VS power_in Negative supply rail. Nominal -5 V; operating range -4 V to -5.5 V (absolute max ±6.5 V total). Bypass with local decoupling capacitors.
8 -In input Inverting analog input to the differential input stage. High-impedance input; common-mode range set by ±VS rails.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Motor Driver ICs
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • VCA810AIDR

CAD (KiCad official)

  • Symbol: VCA810AIDR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: vca810aidr-etched.step / vca810aidr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); vca810aidr.step / vca810aidr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (None pp, sha256 26e0a17bee78cbf2, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF