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VBA3410

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VBsemi Elec MOSFETs, SO-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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docs vba3410: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers vba3410: viewers · Ray 1mo ago
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page.json vba3410: specified limits as data (metadata.characteristics, 37 rows from the datasheet) · Ray 23d ago
README.md vba3410: specified limits as data (metadata.characteristics, 37 rows from the datasheet) · Ray 23d ago
vba3410-etched.fit.json vba3410: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
vba3410-etched.glb vba3410: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
vba3410-etched.step vba3410: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
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VBA3410

VBsemi Elec · MOSFETs · SO-8

VBA3410 from VBsemi Elec, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of MOSFET #1. Body-diode anode; carries source current up to IS = 17 A continuous / 45 A pulsed at TC = 25 °C.
2 G1 input Gate of MOSFET #1. VGS(th) typ. 1.2 V (min), 2.5 V (max); absolute-maximum VGS = ±20 V. Gate charge Qg ≈ 5.9 nC at VGS = 5 V.
3 S2 passive Source of MOSFET #2. Body-diode anode; carries source current up to IS = 17 A continuous / 45 A pulsed at TC = 25 °C.
4 G2 input Gate of MOSFET #2. VGS(th) typ. 1.2 V (min), 2.5 V (max); absolute-maximum VGS = ±20 V. Gate charge Qg ≈ 5.9 nC at VGS = 5 V.
5 D2 passive Drain of MOSFET #2 (paralleled with pin 6). VDS abs-max = 40 V; RDS(on) = 10 mΩ at VGS = 10 V. Both D2 pins should be tied together on the PCB for full current handling and thermal performance.
6 D2 passive Drain of MOSFET #2 (paralleled with pin 5). VDS abs-max = 40 V; RDS(on) = 10 mΩ at VGS = 10 V. Both D2 pins should be tied together on the PCB for full current handling and thermal performance.
7 D1 passive Drain of MOSFET #1 (paralleled with pin 8). VDS abs-max = 40 V; RDS(on) = 10 mΩ at VGS = 10 V. Both D1 pins should be tied together on the PCB for full current handling and thermal performance.
8 D1 passive Drain of MOSFET #1 (paralleled with pin 7). VDS abs-max = 40 V; RDS(on) = 10 mΩ at VGS = 10 V. Both D1 pins should be tied together on the PCB for full current handling and thermal performance.

Key specifications

Parameter Value
Manufacturer VBsemi Elec
Package SO-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS 40 V 1
Gate-Source Voltage VGS -20 20 V 1
Continuous Drain Current ID 10 A TA = 25 °C 1
Continuous Drain Current ID 8 A TA = 70 °C 1
Pulsed Drain Current IDM 45 A 1
Continuous Source-Drain Diode Current IS 1.6 A TA = 25 °C 1
Single Pulse Avalanche Current IAS 17 A L = 0.1 mH 1
Avalanche Energy EAS 21 mJ L = 0.1 mH 1
Maximum Power Dissipation PD 2.1 W TA = 25 °C 1
Maximum Power Dissipation PD 1.2 W TA = 70 °C 1
Operating Junction and Storage Temperature Range TJ, Tstg -55 150 °C 1
Maximum Junction-to-Ambient RthJA 39 53 °C/W t ≤ 10 s 1
Maximum Junction-to-Ambient RthJA 85 °C/W Steady state (note d) 1
Maximum Junction-to-Foot (Drain) RthJF 25 29 °C/W Steady state 1
Drain-Source Breakdown Voltage VDS 40 V VGS = 0 V, ID = 250 µA 2
Gate-Source Threshold Voltage VGS(th) 1.2 2.5 V VDS = VGS, ID = 250 µA 2
Gate-Source Leakage IGSS -100 100 nA VDS = 0 V, VGS = ± 20 V 2
Zero Gate Voltage Drain Current IDSS 1 µA VDS = 40 V, VGS = 0 V 2
Zero Gate Voltage Drain Current IDSS 10 µA VDS = 40 V, VGS = 0 V, TJ = 55 °C 2
On-State Drain Current ID(on) 20 A VDS ≥ 5 V, VGS = 10 V 2
Drain-Source On-State Resistance RDS(on) 0.01 Ω VGS = 10 V, ID = 10 A 2
Drain-Source On-State Resistance RDS(on) 0.015 Ω VGS = 4.5 V, ID = 9 A 2
Total Gate Charge Qg 15 23 nC VDS = 15 V, VGS = 10 V, ID = 10 A 2
Total Gate Charge Qg 5.9 10.2 nC VDS = 15 V, VGS = 5 V, ID = 10 A 2
Gate Resistance Rg 0.36 1.8 3.6 Ω f = 1 MHz 2
Turn-On Delay Time td(on) 16 24 ns VDD = 15 V, RL = 1.4 Ω, ID ≅ 9 A, VGEN = 4.5 V, Rg = 1 Ω 2
Rise Time tr 12 18 ns VDD = 15 V, RL = 1.4 Ω, ID ≅ 9 A, VGEN = 4.5 V, Rg = 1 Ω 2
Turn-Off Delay Time td(off) 16 24 ns VDD = 15 V, RL = 1.4 Ω, ID ≅ 9 A, VGEN = 4.5 V, Rg = 1 Ω 2
Fall Time tf 10 20 ns VDD = 15 V, RL = 1.4 Ω, ID ≅ 9 A, VGEN = 4.5 V, Rg = 1 Ω 2
Turn-On Delay Time td(on) 8 16 ns VDD = 15 V, RL = 1.4 Ω, ID ≅ 9 A, VGEN = 10 V, Rg = 1 Ω 2
Rise Time tr 10 20 ns VDD = 15 V, RL = 1.4 Ω, ID ≅ 9 A, VGEN = 10 V, Rg = 1 Ω 2
Fall Time tf 8 15 ns VDD = 15 V, RL = 1.4 Ω, ID ≅ 9 A, VGEN = 10 V, Rg = 1 Ω 2
Continuous Source-Drain Diode Current IS 17 A TC = 25 °C 2
Pulse Diode Forward Current ISM 45 A 2
Body Diode Voltage VSD 0.8 1.2 V IS = 9 A 2
Body Diode Reverse Recovery Time trr 15 30 ns IF = 9 A, dI/dt = 100 A/µs, TJ = 25 °C 2
Body Diode Reverse Recovery Charge Qrr 6 12 nC IF = 9 A, dI/dt = 100 A/µs, TJ = 25 °C 2

CAD (KiCad official)

  • Symbol: VBA3410
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: vba3410-etched.step / vba3410-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); vba3410.step / vba3410.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: VBsemi Elec datasheet (9 pp, sha256 0593ea1ca06ab621, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF