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VA2110SPG10
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VIVA(昱盛) Audio Amplifiers, SOP-10. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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VA2110SPG10
VIVA(昱盛) · Audio Amplifiers · SOP-10
VA2110SPG10 from VIVA(昱盛), in a SOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SD_B | input | Active-low shutdown control with TTL logic levels referenced to VDD; it should be held high during normal operation, and pulling it low puts the amplifier into a low-current state. |
| 2 | VREG | power_out | Internal regulator output that biases the upper output MOSFET gates, specified at 5.25 V to 6.25 V with 100 µA load over VDD = 6 V to 26 V, and requires at least 1 µF to ground. |
| 3 | INN | input | Negative audio signal input with a typical input impedance of 9 kΩ at the fixed 36 dB gain. |
| 4 | INP | input | Positive audio signal input with a typical input impedance of 9 kΩ at the fixed 36 dB gain. |
| 5 | MUTE | input | Mute input for fast output disable/enable (HIGH = outputs Hi-Z, LOW = outputs enabled), is 5 V TTL compliant, must not be connected to VDD or any source above 5 V, and should not be left floating. |
| 6 | VDD | power_in | Power supply for the amplifier and output transistors, operating from 6.0 V to 26 V with an absolute maximum of 30 V. |
| 7 | OUTP | output | Positive PWM output to the speaker, with a 0.47 µF bootstrap capacitor connected from this pin to BSP. |
| 8 | BSP | bidirectional | Bootstrap I/O for the positive high-side switch, requiring a 0.47 µF ceramic capacitor rated at least 25 V between OUTP and BSP. |
| 9 | BSN | bidirectional | Bootstrap I/O for the negative high-side switch, requiring a 0.47 µF ceramic capacitor rated at least 25 V between OUTN and BSN. |
| 10 | OUTN | output | Negative PWM output to the speaker, with a 0.47 µF bootstrap capacitor connected from this pin to BSN. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | VIVA(昱盛) |
| Package | SOP-10 |
| Category | Amplifiers/Comparators |
| Pins | 10 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (recommended operating) | VDD | 6 | 26 | V | VDD | 2 | |
| Operating free-air temperature (recommended operating) | TA | -40 | 85 | oC | 2 | ||
| Supply voltage (absolute maximum) | VDD(VDD) | -0.3 | 30 | V | 2 | ||
| Low voltage input (absolute maximum) | LVDD(VREG) | -0.3 | 6 | V | 2 | ||
| Input voltage (absolute maximum) | VI (INP, INN, SD_B, MUTE) | -0.3 | 6.5 | V | 2 | ||
| Operating free-air temperature range (absolute maximum) | TA | -40 | 85 | oC | 2 | ||
| Operating junction temperature range | TJ | -40 | 150 | oC | 2 | ||
| Storage temperature range | TSTG | -65 | 150 | oC | 2 | ||
| Minimum load resistance | R(LOAD) | 4 | Ω | 2 | |||
| Electrostatic discharge, human body model | -2 | 2 | kV | Human body model | 2 | ||
| Electrostatic discharge, machine model | -200 | 200 | V | Machine model | 2 | ||
| Input impedance (range per functional description) | ZI | 7.2 | 9 | 10.8 | kΩ | 5 | |
| Output offset voltage (measured differentially) | /VOS/ | 2 | 20 | mV | VI=0V | 4 | |
| Quiescent current | IQ | 24 | 45 | mA | No load, Without L/C filter | 4 | |
| Shutdown current | ISD | 300 | 500 | μA | No load | 4 | |
| Regulator output | VREG | 5.25 | 5.75 | 6.25 | V | IVREG = 100μA, VDD=6~26V | 4 |
| Turn-on time | tON | 30 | ms | 4 | |||
| Internal oscillation frequency | fOSC | 260 | kHz | 4 | |||
| Amplifier gain | A | 36 | dB | VDD=12V | 4 | ||
| Drain-Source ON resistance, high side | RDS(ON) | 120 | mΩ | VDD=12V, IOUT=500mA | 4 | ||
| Drain-Source ON resistance, low side | RDS(ON) | 120 | mΩ | VDD=12V, IOUT=500mA | 4 | ||
| DC detect time | tDC-DET | 450 | ms | 4 | |||
| Output power | PO | 30 | W | THD+N=1%, f=1kHz, RL=4Ω, VDD = 18V | 4 | ||
| Output power | PO | 17.8 | W | THD+N=10%, f=1kHz, RL=4Ω, VDD = 12V | 4 | ||
| Total harmonic distortion plus noise | THD+N | 0.05 | % | VDD=12V, PO=5W, RL=4Ω, f=1kHz | 4 | ||
| Offset voltage | /VOS/ | 20 | mV | 4 | |||
| Supply ripple rejection ratio | /KSVR/ | 68 | dB | Input AC-Grounded, Ci=1μF, f=1kHz | 4 | ||
| Signal-to-Noise ratio | /SNR/ | 94 | dB | A-weighted, THD+N=1%, RL=8Ω | 4 | ||
| Output voltage noise, no weight | Vn | 330 | μVRMS | VDD=12V, f=20Hz to 20kHz, Input AC-Grounded, Ci=1μF | 4 | ||
| Output voltage noise, A-weighted | Vn | 160 | μVRMS | VDD=12V, f=20Hz to 20kHz, Input AC-Grounded, Ci=1μF | 4 | ||
| Common mode rejection ratio | /CMRR/ | 66 | dB | VDD=12V, VIC=1VPP f=120Hz | 4 | ||
| Thermal resistance, junction to case | θJC | 10 | oC/W | 2 | |||
| Thermal resistance, junction to air | θJA | 50 | oC/W | 2 |
CAD (KiCad official)
- Symbol:
VA2110SPG10 - Footprint:
Package_SO:SOIC-10_3.9x4.9mm_P1mm - 3D model: SOP-10, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.75 mm nominal SOIC height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
va2110spg10-etched.step/va2110spg10-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);va2110spg10.step/va2110spg10.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: VIVA(昱盛) datasheet (13 pp, sha256
161355f5927e9ee0, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# VA2110SPG10
**VIVA(昱盛)** · Audio Amplifiers · SOP-10
VA2110SPG10 from VIVA(昱盛), in a SOP-10. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SD_B | input | Active-low shutdown control with TTL logic levels referenced to VDD; it should be held high during normal operation, and pulling it low puts the amplifier into a low-current state. |
| 2 | VREG | power_out | Internal regulator output that biases the upper output MOSFET gates, specified at 5.25 V to 6.25 V with 100 µA load over VDD = 6 V to 26 V, and requires at least 1 µF to ground. |
| 3 | INN | input | Negative audio signal input with a typical input impedance of 9 kΩ at the fixed 36 dB gain. |
| 4 | INP | input | Positive audio signal input with a typical input impedance of 9 kΩ at the fixed 36 dB gain. |
| 5 | MUTE | input | Mute input for fast output disable/enable (HIGH = outputs Hi-Z, LOW = outputs enabled), is 5 V TTL compliant, must not be connected to VDD or any source above 5 V, and should not be left floating. |
| 6 | VDD | power_in | Power supply for the amplifier and output transistors, operating from 6.0 V to 26 V with an absolute maximum of 30 V. |
| 7 | OUTP | output | Positive PWM output to the speaker, with a 0.47 µF bootstrap capacitor connected from this pin to BSP. |
| 8 | BSP | bidirectional | Bootstrap I/O for the positive high-side switch, requiring a 0.47 µF ceramic capacitor rated at least 25 V between OUTP and BSP. |
| 9 | BSN | bidirectional | Bootstrap I/O for the negative high-side switch, requiring a 0.47 µF ceramic capacitor rated at least 25 V between OUTN and BSN. |
| 10 | OUTN | output | Negative PWM output to the speaker, with a 0.47 µF bootstrap capacitor connected from this pin to BSN. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | VIVA(昱盛) |
| Package | SOP-10 |
| Category | Amplifiers/Comparators |
| Pins | 10 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (recommended operating) | VDD | 6 | | 26 | V | VDD | 2 |
| Operating free-air temperature (recommended operating) | TA | -40 | | 85 | oC | | 2 |
| Supply voltage (absolute maximum) | VDD(VDD) | -0.3 | | 30 | V | | 2 |
| Low voltage input (absolute maximum) | LVDD(VREG) | -0.3 | | 6 | V | | 2 |
| Input voltage (absolute maximum) | VI (INP, INN, SD_B, MUTE) | -0.3 | | 6.5 | V | | 2 |
| Operating free-air temperature range (absolute maximum) | TA | -40 | | 85 | oC | | 2 |
| Operating junction temperature range | TJ | -40 | | 150 | oC | | 2 |
| Storage temperature range | TSTG | -65 | | 150 | oC | | 2 |
| Minimum load resistance | R(LOAD) | 4 | | | Ω | | 2 |
| Electrostatic discharge, human body model | | -2 | | 2 | kV | Human body model | 2 |
| Electrostatic discharge, machine model | | -200 | | 200 | V | Machine model | 2 |
| Input impedance (range per functional description) | ZI | 7.2 | 9 | 10.8 | kΩ | | 5 |
| Output offset voltage (measured differentially) | /VOS/ | | 2 | 20 | mV | VI=0V | 4 |
| Quiescent current | IQ | | 24 | 45 | mA | No load, Without L/C filter | 4 |
| Shutdown current | ISD | | 300 | 500 | μA | No load | 4 |
| Regulator output | VREG | 5.25 | 5.75 | 6.25 | V | IVREG = 100μA, VDD=6~26V | 4 |
| Turn-on time | tON | | 30 | | ms | | 4 |
| Internal oscillation frequency | fOSC | | 260 | | kHz | | 4 |
| Amplifier gain | A | | 36 | | dB | VDD=12V | 4 |
| Drain-Source ON resistance, high side | RDS(ON) | | 120 | | mΩ | VDD=12V, IOUT=500mA | 4 |
| Drain-Source ON resistance, low side | RDS(ON) | | 120 | | mΩ | VDD=12V, IOUT=500mA | 4 |
| DC detect time | tDC-DET | | 450 | | ms | | 4 |
| Output power | PO | | 30 | | W | THD+N=1%, f=1kHz, RL=4Ω, VDD = 18V | 4 |
| Output power | PO | | 17.8 | | W | THD+N=10%, f=1kHz, RL=4Ω, VDD = 12V | 4 |
| Total harmonic distortion plus noise | THD+N | | 0.05 | | % | VDD=12V, PO=5W, RL=4Ω, f=1kHz | 4 |
| Offset voltage | /VOS/ | | 20 | | mV | | 4 |
| Supply ripple rejection ratio | /KSVR/ | | 68 | | dB | Input AC-Grounded, Ci=1μF, f=1kHz | 4 |
| Signal-to-Noise ratio | /SNR/ | | 94 | | dB | A-weighted, THD+N=1%, RL=8Ω | 4 |
| Output voltage noise, no weight | Vn | | 330 | | μVRMS | VDD=12V, f=20Hz to 20kHz, Input AC-Grounded, Ci=1μF | 4 |
| Output voltage noise, A-weighted | Vn | | 160 | | μVRMS | VDD=12V, f=20Hz to 20kHz, Input AC-Grounded, Ci=1μF | 4 |
| Common mode rejection ratio | /CMRR/ | | 66 | | dB | VDD=12V, VIC=1VPP f=120Hz | 4 |
| Thermal resistance, junction to case | θJC | | 10 | | oC/W | | 2 |
| Thermal resistance, junction to air | θJA | | 50 | | oC/W | | 2 |
## CAD (KiCad official)
- Symbol: `VA2110SPG10`
- Footprint: `Package_SO:SOIC-10_3.9x4.9mm_P1mm`
- 3D model: SOP-10, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.75 mm nominal SOIC height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files: `va2110spg10-etched.step` / `va2110spg10-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `va2110spg10.step` / `va2110spg10.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [VIVA(昱盛) datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590904092166336512) (13 pp, sha256 `161355f5927e9ee0`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/va2110spg10-datasheet.pdf)