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Contents

README

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V20PW45-M3

Vishay Intertech · Schottky Diodes · TO-252-2

V20PW45-M3 from Vishay Intertech, in a TO-252-2. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 K passive Pin 1 is labelled K (cathode) in the pin diagram; the datasheet gives a maximum repetitive peak reverse voltage of 45 V and an average forward rectified current of 20 A for the device.
2 HEATSINK passive Pin 2 is the heatsink tab, labelled HEATSINK in the pin diagram; the datasheet does not state its electrical connection beyond this label and gives a junction-to-mount thermal resistance RθJM of 1.8 °C/W.
3 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package TO-252-2
Category Diodes
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Maximum instantaneous forward voltage VF 0.53 0.61 V IF = 20 A, TA = 25 °C 2
Maximum instantaneous forward voltage VF 0.46 0.54 V IF = 20 A, TA = 125 °C 2
Reverse current IR 1.5 mA VR = 45 V, TA = 25 °C 2
Reverse current IR 13 50 mA VR = 45 V, TA = 125 °C 2
Maximum repetitive peak reverse voltage VRRM 45 V 1
Maximum average forward rectified current IF(AV) 20 A 1
Peak forward surge current IFSM 200 A 8.3 ms single half sine-wave superimposed on rated load 1
Operating junction temperature range TJ -40 150 °C 1
Storage temperature range TSTG -55 150 °C 1
Typical thermal resistance, junction to ambient RθJA 55 °C/W Free air, mounted on recommended copper pad area 2
Typical thermal resistance, junction to mount RθJM 1.8 °C/W Mounted on infinite heat sink 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin Terminals: matte tin plated leads, solderable per J-STD-002 and JESD 22-B102 1

CAD (KiCad official)

  • Symbol: V20PW45-M3
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252-2 (KiCad packages3D, STEP)
  • 3D model files: v20pw45-m3-etched.step / v20pw45-m3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); v20pw45-m3.step / v20pw45-m3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (5 pp, sha256 d59bbdd5ac1dc939, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF