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USBLC6-2P6-ES

ElecSuper · ESD And Surge Protection (TVS/ESD) · SOT-563

USBLC6-2P6-ES from ElecSuper, in a SOT-563. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IO bidirectional Connects to I/O line 1 of the ESD and transient protection array, per the pin configuration table.
2 GND power_in Connects to ground and serves as the common return for the ESD protection diodes.
3 IO bidirectional Connects to I/O line 2 of the ESD and transient protection array, per the pin configuration table.
4 IO bidirectional Connects to I/O line 2 of the ESD and transient protection array, per the pin configuration table.
5 Vcc power_in Connects to the Vcc supply of the protected system; the datasheet gives no pin-specific voltage limit.
6 IO bidirectional Connects to I/O line 1 of the ESD and transient protection array, per the pin configuration table.

Key specifications

Parameter Value
Manufacturer ElecSuper
Package SOT-563
Category Circuit Protection
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Peak pulse power Ppk 60 W tp=8/20us@25℃ 2
Peak pulse current IPP 4 A tp=8/20us@25℃ 2
ESD (IEC61000-4-2 air discharge) VESD 17 kV @25℃ 2
ESD (IEC61000-4-2 contact discharge) VESD 12 kV @25℃ 2
Junction temperature TJ 150 ℃ 2
Operating temperature TOP -40 125 ℃ Over operating free-air temperature range 2
Storage temperature TSTG -55 150 ℃ 2
Lead temperature TL 260 ℃ 2
Reverse stand-off voltage VRWM 5 V 3
Reverse Breakdown Voltage VBR 6 V IT= 1mA 3
Reverse Leakage Current IR 1 uA VRWM=5V 3
Peak Pulse Current IPP 4 A TP=8/20us@25℃ 3
Clamping Voltage VCL 9 10 V IPP=1A; TP=8/20us 3
Clamping Voltage VCL 12 15 V IPP=4.0A; TP=8/20us 3
Junction capacitance (I/O pins to ground) CJ 0.6 0.8 pF I/O pins to ground; VR=0V; f = 1MHz 3
Junction capacitance (between I/O pins) CJ 0.3 0.4 pF Between I/O pins; VR=0V; f = 1MHz 3

CAD (KiCad official)

  • Symbol: USBLC6-2P6-ES
  • Footprint: Package_TO_SOT_SMD:SOT-563
  • 3D model: SOT-563 (KiCad packages3D, STEP)
  • 3D model files: usblc6-2p6-es-etched.step / usblc6-2p6-es-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); usblc6-2p6-es.step / usblc6-2p6-es.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ElecSuper datasheet (6 pp, sha256 eba3b6c49774e0d0, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF