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USB2534-1080AEN

Microchip Tech · USB ICs · QFN-36-EP(6x6)

USB2534-1080AEN from Microchip Tech, in a QFN-36-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	SWAP_USBDN1_DM/PRT_DIS_M1	bidirectional	Downstream USB Port 1 D- data signal, optionally swappable with upstream Port 0; PRT_DIS_M1 must be tied to VDD33 at reset together with PRT_DIS_P1 to disable Port 1.
2	SWAP_USBDN1_DP/PRT_DIS_P1	bidirectional	Downstream USB Port 1 D+ data signal, optionally swappable with upstream Port 0; PRT_DIS_P1 must be tied to VDD33 at reset together with PRT_DIS_M1 to disable Port 1.
3	USBDN2_DM/PRT_DIS_M2	bidirectional	Downstream USB Port 2 D- data signal; PRT_DIS_M2 must be tied to VDD33 at reset together with PRT_DIS_P2 to disable Port 2.
4	USBDN2_DP/PRT_DIS_P2	bidirectional	Downstream USB Port 2 D+ data signal; PRT_DIS_P2 must be tied to VDD33 at reset together with PRT_DIS_M2 to disable Port 2.
5	NC	unconnected	No connect; must be left floating for normal device operation.
6	USBDN3_DM/PRT_DIS_M3	bidirectional	Downstream USB Port 3 D- data signal; PRT_DIS_M3 must be tied to VDD33 at reset together with PRT_DIS_P3 to disable Port 3.
7	USBDN3_DP/PRT_DIS_P3	bidirectional	Downstream USB Port 3 D+ data signal; PRT_DIS_P3 must be tied to VDD33 at reset together with PRT_DIS_M3 to disable Port 3.
8	USBDN4_DM/PRT_DIS_M4	bidirectional	Downstream USB Port 4 D- data signal; PRT_DIS_M4 must be tied to VDD33 at reset together with PRT_DIS_P4 to disable Port 4.
9	USBDN4_DP/PRT_DIS_P4	bidirectional	Downstream USB Port 4 D+ data signal; PRT_DIS_P4 must be tied to VDD33 at reset together with PRT_DIS_M4 to disable Port 4.
10	VDDA33	power_in	+3.3V analog power supply; must be connected to VDD33.
11	LED0/FLEX_IN	output	For the USB2534 (not PF) this pin is General Purpose LED 0 output, configurable to blink or breathe at various rates and enabled only via the Protouch tool.
12	PRTPWR1/PRTCTL1/BC_EN1	bidirectional	Port 1 power output (0 = power disabled, 1 = power enabled) that also serves as PRTCTL1 with OCS1_N; BC_EN1 strap high at reset enables battery charging on Port 1.
13	OCS1_N	input	Active-low over-current sense input from an external current monitor for USB Port 1, internally pulled up (50 µA typical); must be pulled high at POR for UCS100x compatibility.
14	VDDCR12	power_out	+1.2V core power supply from the internal regulator; a 1.0 µF (<1 Ω ESR) capacitor to ground is required for regulator stability, placed as close to the device as possible.
15	VDD33	power_in	+3.3V power supply; must be connected to VDDA33.
16	PRTPWR2/PRTCTL2/BC_EN2	bidirectional	Port 2 power output (0 = power disabled, 1 = power enabled) that also serves as PRTCTL2 with OCS2_N; BC_EN2 strap high at reset enables battery charging on Port 2.
17	OCS2_N	input	Active-low over-current sense input from an external current monitor for USB Port 2, internally pulled up (50 µA typical).
18	PRTPWR3/PRTCTL3/BC_EN3	bidirectional	Port 3 power output (0 = power disabled, 1 = power enabled) that also serves as PRTCTL3 with OCS3_N; BC_EN3 strap high at reset enables battery charging on Port 3.
19	UART_RX/OCS3_N	input	Internal UART receive input (3.3V signal; RS232 operation requires an external 12V translator) and, as OCS3_N, an active-low over-current sense input for Port 3 with internal pull-up.
20	PRTPWR4/PRTCTL4/BC_EN4	bidirectional	Port 4 power output (0 = power disabled, 1 = power enabled) that also serves as PRTCTL4 with OCS4_N; BC_EN4 strap high at reset enables battery charging on Port 4.
21	UART_TX/OCS4_N	output	Internal UART transmit output (3.3V signal; RS232 operation requires an external 12V driver) and, as OCS4_N, an active-low over-current sense input for Port 4 with internal pull-up.
22	SDA/SMBDATA/NON_REM1	bidirectional	I2C bidirectional serial data (IS/OD8, 8 mA sink), alternatively SMBus serial data; also the NON_REM1 configuration strap sampled at RESET_N negation.
23	VDD33	power_in	+3.3V power supply; must be connected to VDDA33.
24	SCL/SMBCLK/CFG_SEL0	input	I2C serial clock input (SMBus clock alternatively), also the CFG_SEL0 strap used with CFG_SEL1 to set the hub configuration method.
25	HS_IND/CFG_SEL1	output	High-speed indicator for the upstream connection (active high if CFG_SEL1=0, active low if CFG_SEL1=1); also the CFG_SEL1 configuration strap used with CFG_SEL0.
26	RESET_N	input	Active-low system reset input; the active-low pulse must be at least 5 µs wide, and the regulators are controlled by this pin.
27	VBUS_DET	input	Detects upstream bus power; for detachable hubs connect to upstream VBUS through a 50k/100k resistor divider to provide 3.3V, and for permanently attached hosts connect to 3.3V or 5.0V via a divider to provide 3.3V.
28	SUSP_IND/LOCAL_PWR/NON_REM0	output	Open-drain (8 mA sink) suspend indicator (default function, 0 = unconfigured or suspended, 1 = configured and active); also LOCAL_PWR self-power detect input and NON_REM0 configuration strap.
29	VDDA33	power_in	+3.3V analog power supply; must be connected to VDD33.
30	FLEX_USBUP_DM	bidirectional	Upstream USB Port 0 D- data signal, optionally swappable with downstream Port 1 signals.
31	FLEX_USBUP_DP	bidirectional	Upstream USB Port 0 D+ data signal, optionally swappable with downstream Port 1 signals.
32	XTAL2	output	External 24 MHz crystal output (oscillator output pin); left unconnected when REFCLK is driven by a single-ended clock oscillator.
33	XTAL1/REFCLK	input	External 24 MHz crystal input, or reference clock input when driven by a single-ended clock oscillator.
34	NC	unconnected	No connect; must be left floating for normal device operation.
35	RBIAS	passive	External USB transceiver bias pin; a 12.0k (+/-1%) resistor is attached from this pin to ground to set the transceiver's internal bias settings.
36	VDDA33	power_in	+3.3V analog power supply; must be connected to VDD33.
37	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	Microchip Tech
Package	QFN-36-EP(6x6)
Category	Communication Interface Chip/UART/485/232
Pins	37

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Low input level (IS type input buffer)	VIL	-0.3		0.8	V	IS type input buffer	37
High input level (IS type input buffer)	VIH	2		3.6	V	IS type input buffer	37
Low input level (I_RST type input buffer)	VIL	-0.3		0.4	V	I_RST type input buffer	37
High input level (I_RST type input buffer)	VIH	1.25		3.6	V	I_RST type input buffer	37
Low input level (I_SMB type input buffer)	VIL	-0.3		0.35	V	I_SMB type input buffer	37
High input level (I_SMB type input buffer)	VIH	1.25		3.6	V	I_SMB type input buffer	37
Low output level (O8 type buffers)	VOL			0.4	V	IOL = 8 mA	37
Low output level (OD8 type buffer)	VOL			0.4	V	IOL = 8 mA	37
Low output level (OD12 type buffer)	VOL			0.4	V	IOL = 12 mA	37
Low input level (ICLK type buffer, XTAL1/REFCLK input)	VIL	-0.3		0.35	V	ICLK type buffer, XTAL1/REFCLK input	37
High input level (ICLK type buffer, XTAL1/REFCLK input)	VIH	0.8		3.6	V	ICLK type buffer, XTAL1/REFCLK input	37
+3.3 V supply voltage (VDD33, VDDA33)	VDD33	3		3.6	V	VDD33 and VDDA33 supply	35
Ambient operating temperature in still air	TA	0		70	°C	Commercial version (Note 9-5)	35
Power supply rise time	tRT			10	ms	RESET_N asserted at power-on (Note 9-4)	35
Power supply rise time	tRT			1	ms	RESET_N not used at power-on (tied high) (Note 9-4)	35
Supply voltage (VDD33, VDDA33)	VDD33, VDDA33	0		3.6	V	Note 9-1	34
Positive voltage on input signal pins, with respect to ground				3.6	V	Note 9-2: does not apply to USB DM/DP, XTAL1/REFCLK, XTAL2	34
Negative voltage on input signal pins, with respect to ground		-0.5			V	Input signal pins with respect to ground	34
Storage temperature		-55		150	°C		34
Operational power consumption, VDD33			65	75	mA	Operational; HS Host / 1 HS Device	35
Operational power consumption, VDD33			95	110	mA	Operational; HS Host / 2 HS Devices	35
Operational power consumption, VDD33			125	145	mA	Operational; HS Host / 3 HS Devices	35
Operational power consumption, VDD33			155	175	mA	Operational; HS Host / 4 HS Devices	35
Operational power consumption, VDD33			45	50	mA	Operational; HS Host / 1 FS Device	35
Operational power consumption, VDD33			50	60	mA	Operational; HS Host / 2 FS Devices	35
Operational power consumption, VDD33			55	70	mA	Operational; HS Host / 3 FS Devices	35
Operational power consumption, VDD33			65	80	mA	Operational; HS Host / 4 FS Devices	35
Unconfigured power consumption, VDD33			30		mA	Unconfigured	35
Suspend supply current	IVDD33		320	1250	uA	Suspend; typ at 25°C, max (commercial) with VDD33 = 3.6 V	36
Standby supply current	IVDD33		75	130	uA	Standby; typ at 25°C, max (commercial) with VDD33 = 3.6 V	36
Configuration strap hold after external power supply at operational level	tcsh	1			ms	Power-on configuration strap valid timing (Table 9-6)	38
RESET_N input assertion time	trstia	5			us	Reset and configuration strap timing (Table 9-7)	38
Configuration strap hold after RESET_N deassertion	tcsh	1			ms	Reset and configuration strap timing (Table 9-7)	38
Junction-to-ambient thermal resistance	JA		35		°C/W	0 m/s air velocity	36
Junction-to-ambient thermal resistance	JA		30		°C/W	1 m/s air velocity	36
Junction-to-ambient thermal resistance	JA		27		°C/W	2.5 m/s air velocity	36
Junction-to-board thermal resistance	JB		20		°C/W		36
Junction-to-top-of-package thermal resistance	JC		3.4		°C/W		36
Junction-to-bottom-of-case thermal resistance	JT		0.3		°C/W	0 m/s air velocity	36
Junction-to-board thermal resistance	JB		19		°C/W	0 m/s air velocity	36
Crystal fundamental frequency	Ffund		24		MHz	Fundamental mode, parallel resonant	40

CAD (KiCad official)

Symbol: USB2534-1080AEN
Footprint: Package_DFN_QFN:QFN-36-1EP_6x6mm_P0.5mm_EP3.7x3.7mm
3D model: QFN-36-EP(6x6) (KiCad packages3D, STEP)
3D model files: usb2534-1080aen-etched.step / usb2534-1080aen-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); usb2534-1080aen.step / usb2534-1080aen.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Microchip Tech datasheet (46 pp, sha256 3a3c7a3bafc03245, retrieved 2026-10-29, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF