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USB2514BI-AEZG

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Microchip Tech USB Converters, UQFN-36-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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USB2514BI-AEZG

Microchip Tech · USB Converters · UQFN-36-EP(6x6)

USB2514BI-AEZG from Microchip Tech, in a UQFN-36-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 USBDM_DN1/PRT_DIS_M1 bidirectional Hi-Speed USB data (D-) for downstream port 1; when the strap is enabled it is sampled at RESET_N negation, and port 1 is disabled by pulling both PRT_DIS_M1 and PRT_DIS_P1 up with 10 kΩ to 3.3 V.
2 USBDP_DN1/PRT_DIS_P1 bidirectional Hi-Speed USB data (D+) for downstream port 1; when the strap is enabled it is sampled at RESET_N negation, and port 1 is disabled by pulling both PRT_DIS_M1 and PRT_DIS_P1 up with 10 kΩ to 3.3 V.
3 USBDM_DN2/PRT_DIS_M2 bidirectional Hi-Speed USB data (D-) for downstream port 2; when the strap is enabled it is sampled at RESET_N negation, and port 2 is disabled by pulling both PRT_DIS_M2 and PRT_DIS_P2 up.
4 USBDP_DN2/PRT_DIS_P2 bidirectional Hi-Speed USB data (D+) for downstream port 2; when the strap is enabled it is sampled at RESET_N negation, and port 2 is disabled by pulling both PRT_DIS_M2 and PRT_DIS_P2 up.
5 VDDA33 power_in 3.3 V analog power supply pin.
6 USBDM_DN3/PRT_DIS_M3 bidirectional Hi-Speed USB data (D-) for downstream port 3; when the strap is enabled it is sampled at RESET_N negation, and port 3 is disabled by pulling both PRT_DIS_M3 and PRT_DIS_P3 up.
7 USBDP_DN3/PRT_DIS_P3 bidirectional Hi-Speed USB data (D+) for downstream port 3; when the strap is enabled it is sampled at RESET_N negation, and port 3 is disabled by pulling both PRT_DIS_M3 and PRT_DIS_P3 up.
8 USBDM_DN4/PRT_DIS_M4 bidirectional Hi-Speed USB data (D-) for downstream port 4; when the strap is enabled it is sampled at RESET_N negation, and port 4 is disabled by pulling both PRT_DIS_M4 and PRT_DIS_P4 up.
9 USBDP_DN4/PRT_DIS_P4 bidirectional Hi-Speed USB data (D+) for downstream port 4; when the strap is enabled it is sampled at RESET_N negation, and port 4 is disabled by pulling both PRT_DIS_M4 and PRT_DIS_P4 up.
10 VDDA33 power_in 3.3 V analog power supply pin.
11 TEST input Test pin (internal pull-down); treat as a no-connect or connect to ground, and do not route or attach any signal to it.
12 PRTPWR1/BC_EN1 bidirectional USB port 1 power enable output (O12) that enables power to downstream devices; as a strap, BC_EN1 enables battery charging on port 1 when high and is sampled at RESET_N negation.
13 OCS_N1 input Over-current sense input for port 1 from an external current monitor, active low, with an internal pull-up.
14 CRFILT passive Core regulator filter capacitor pin; may have up to 0.1 µF low-ESR capacitor to VSS, or be left unconnected.
15 VDD33 power_in 3.3 V digital power supply pin.
16 PRTPWR2/BC_EN2 bidirectional USB port 2 power enable output (O12) that enables power to downstream devices; as a strap, BC_EN2 enables battery charging on port 2 when high and is sampled at RESET_N negation.
17 OCS_N2 input Over-current sense input for port 2 from an external current monitor, active low, with an internal pull-up.
18 PRTPWR3/BC_EN3 bidirectional USB port 3 power enable output (O12) that enables power to downstream devices; as a strap, BC_EN3 enables battery charging on port 3 when high and is sampled at RESET_N negation.
19 OCS_N3 input Over-current sense input for port 3 from an external current monitor, active low, with an internal pull-up.
20 PRTPWR4/BC_EN4 bidirectional USB port 4 power enable output (O12) that enables power to downstream devices; as a strap, BC_EN4 enables battery charging on port 4 when high and is sampled at RESET_N negation.
21 OCS_N4 input Over-current sense input for port 4 from an external current monitor, active low, with an internal pull-up.
22 SDA/SMBDATA/NON_REM1 bidirectional Serial data signal for the I2C EEPROM or SMBus interface, and strap NON_REM1 sampled at RESET_N negation to set non-removable ports.
23 VDD33 power_in 3.3 V digital power supply pin.
24 SCL/SMBCLK/CFG_SEL0 bidirectional Serial clock for the I2C EEPROM or SMBus interface; CFG_SEL0 is latched on the rising edge of RESET_N to select the configuration method.
25 CFG_SEL1/HS_IND bidirectional CFG_SEL1 is latched on the rising edge of RESET_N to select the configuration method; HS_IND is asserted when the hub is connected at Hi-Speed.
26 RESET_N input System reset input; driving it low resets the chip, with a minimum active-low pulse of 1 µs.
27 VBUS_DET input Detects the state of upstream VBUS to control the internal D+ pull-up; for detachable hubs connect via a 2:1 divider (two 100 kΩ resistors suggested).
28 SUSP_IND/LOCAL_PWR/NON_REM0 bidirectional Active/suspend status indicator; also LOCAL_PWR detects availability of a local self-power source (low = not available) and NON_REM0 is a strap sampled at RESET_N negation.
29 VDDA33 power_in 3.3 V analog power supply pin.
30 USBDM_UP bidirectional USB upstream bus data (D-); connect to the upstream USB bus data signals (host, port, or upstream hub).
31 USBDP_UP bidirectional USB upstream bus data (D+); connect to the upstream USB bus data signals (host, port, or upstream hub).
32 XTALOUT output Crystal output for the 24 MHz crystal, with 1.2 V p-p output and weak (<1 mA) drive; leave unconnected when an external clock drives XTALIN/CLKIN.
33 XTALIN/CLKIN input 24 MHz crystal input, or external 24 MHz clock input when no crystal is used.
34 PLLFILT passive PLL regulator filter capacitor pin; may have up to 0.1 µF low-ESR capacitor to VSS, or be left unconnected.
35 RBIAS passive USB transceiver bias; a 12.0 kΩ (±1%) resistor is attached from ground to this pin.
36 VDDA33 power_in 3.3 V analog power supply pin.
37 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package UQFN-36-EP(6x6)
Category Interface
Pins 37

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Storage temperature TSTOR -55 150 °C 39
3.3 V supply voltage VDD33, VDDA33 4.6 V Applies to all packages 39
Voltage on any I/O pin -0.5 5.5 V 39
Voltage on XTALIN -0.5 4 V 39
Voltage on XTALOUT -0.5 2.5 V 39
Industrial operating temperature TAI -40 85 °C Ambient temperature in still air; only applies to USB251xBi products 39
3.3 V supply voltage VDD33, VDDA33 3 3.6 V Applies to all parts 39
3.3 V supply rise time tRT33 0 400 µs See Figure 6-1 and Note 6-2 39
Voltage on any I/O pin -0.3 5.5 V If any 3.3 V supply voltage drops below 3.0 V, then the MAX becomes (3.3 V supply voltage) + 0.5 39
Voltage on XTALIN -0.3 V 39
Low input level (I, IS buffer) VILI 0.8 V TTL levels 40
High input level (I, IS buffer) VIHI 2 V 40
Input leakage (I, IS buffer) IIL -10 10 µA VIN = 0 to VDD33 40
Hysteresis (IS only) VHYSI 250 350 mV 40
Low input level (IPU buffer) VILI 0.8 V TTL levels 40
High input level (IPU buffer) VIHI 2 V 40
Low input leakage (IPU buffer) IILL 35 90 µA VIN = 0 40
High input leakage (IPU buffer) IIHL -10 10 µA VIN = VDD33 40
Low input level (IPD buffer) VILI 0.8 V TTL levels 40
High input level (IPD buffer) VIHI 2 V 40
Low input leakage (IPD buffer) IILL 10 -10 µA VIN = 0 40
High input leakage (IPD buffer) IIHL -35 -90 µA VIN = VDD33 40
ICLK input low level VILCK 0.3 V 40
ICLK input high level VIHCK 0.9 V 40
ICLK input leakage IIL -10 10 µA VIN = 0 to VDD33 40
Low output level (O12, I/O12, I/OSD12) VOL 0.4 V IOL = 12 mA @ VDD33 = 3.3 V 41
High output level (O12, I/O12, I/OSD12) VOH 2.4 V IOH = -12 mA @ VDD33 = 3.3 V 41
Output leakage (O12, I/O12, I/OSD12) IOL -10 10 µA 41
Hysteresis (SD pad only) IHYSC 250 350 mV VIN = VDD33 41
Supply current unconfigured, hi-speed host (USB2514B/14Bi) ICCINTHS 45 50 mA Unconfigured, hi-speed host; row USB2514B/14Bi 41
Supply current unconfigured, full-speed host (USB2514B/14Bi) ICCINTFS 35 40 mA Unconfigured, full-speed host; row USB2514B/14Bi 41
Supply current configured, hi-speed host (USB2514Bi) IHCH1 70 85 mA Configured, hi-speed host; row USB2514Bi 41
Supply current configured, full-speed host (USB2514Bi) IFCC1 50 65 mA Configured, full-speed host; row USB2514Bi 42
Supply current suspend (USB2514Bi) ICSBY 550 1500 µA All supplies combined 42
Supply current reset (USB2514Bi) ICRST 750 1600 µA All supplies combined 42
Supply current during hardware reset from upstream USB source 500 µA While RESET_N is asserted 35
Bus-powered upstream current 100 mA Bus-powered mode, during t1+t5 36
CFG_SEL[1:0] hold time (t3) t3 16.7 1400 ns RESET_N timing, default configuration 36
Hub outputs driven to inactive logic states (t4) t4 1.5 2 µs RESET_N timing, default configuration 36
SMBus code load (t5) t5 2 1000 ms RESET_N timing, SMBus configuration 38
SMBus slave clock-low timeout minimum TTIMEOUT, MIN 25 ms Clock-low interval after which a slave may abort the transfer 34
SMBus slave reset time maximum TTIMEOUT, MAX 35 ms Slave must reset and be able to receive a new START condition no later than 34
Crystal frequency tolerance -350 350 ppm Parallel resonant, fundamental mode, 24 MHz crystal 44
External clock duty cycle tolerance -10 50 10 % External clock, 50% duty cycle 45
External clock frequency tolerance -350 24 350 ppm External clock, 24 MHz 45
External clock jitter 100 ps rms External clock 45
XTALOUT buffer output current (weak buffer) 1 mA XTALOUT treated as weak buffer output 45
Crystal nominal frequency 24 MHz Parallel resonant, fundamental mode 44

CAD (KiCad official)

  • Symbol: USB2514BI-AEZG
  • Footprint: Package_DFN_QFN:QFN-36-1EP_6x6mm_P0.5mm_EP3.7x3.7mm
  • 3D model: UQFN-36-EP(6x6) (KiCad packages3D, STEP)
  • 3D model files: usb2514bi-aezg-etched.step / usb2514bi-aezg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); usb2514bi-aezg.step / usb2514bi-aezg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (57 pp, sha256 3fca1a17701a3fd5, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF