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USB2512BI-AEZG-TR
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Microchip Tech USB Converters, TQFN-36-EP(6x6). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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Symbol & Footprint
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Datasheet
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README
markdownUSB2512BI-AEZG-TR
Microchip Tech · USB Converters · TQFN-36-EP(6x6)
USB2512BI-AEZG-TR from Microchip Tech, in a TQFN-36-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | USBDM_DN1/PRT_DIS_M1 | bidirectional | Hi-Speed USB data D- for downstream port 1. At RESET_N negation this pin is also sampled together with USBDP_DN1 (PRT_DIS_P1) as a strap: pull both high through 10 kΩ to 3.3 V to disable port 1. |
| 2 | USBDP_DN1/PRT_DIS_P1 | bidirectional | Hi-Speed USB data D+ for downstream port 1. Doubles as PRT_DIS_P1 strap sampled at RESET_N negation (see PRT_DIS_M1). |
| 3 | USBDM_DN2/PRT_DIS_M2 | bidirectional | Hi-Speed USB data D- for downstream port 2. Strap PRT_DIS_M2 to disable port 2 (see port 1). |
| 4 | USBDP_DN2/PRT_DIS_P2 | bidirectional | Hi-Speed USB data D+ for downstream port 2. Doubles as PRT_DIS_P2 strap. |
| 5 | VDDA33 | power_in | 3.3 V analog power supply input. Decouple locally per Microchip guidelines. |
| 6 | NC | unconnected | No Connect on USB2512B/12Bi. Leave floating; do not route. |
| 7 | NC | unconnected | No Connect on USB2512B/12Bi. Leave floating; do not route. |
| 8 | NC | unconnected | No Connect on USB2512B/12Bi. Leave floating; do not route. |
| 9 | NC | unconnected | No Connect on USB2512B/12Bi. Leave floating; do not route. |
| 10 | VDDA33 | power_in | 3.3 V analog power supply input. |
| 11 | TEST | input | Test pin (IPD, internal pull-down). Treat as a no-connect or tie to VSS/GND; no trace or signal should be routed to this pin. |
| 12 | PRTPWR1/BC_EN1 | output | USB downstream port 1 power enable output (O12, 12 mA). Also strapped as BC_EN1 (IPD): sampled at RESET_N negation to enable USB Battery Charging (BC 1.1) for port 1. |
| 13 | OCS_N1 | input | Active-low over-current sense input for port 1 (IPU, internal pull-up). Driven low by an external port-power controller when an over-current event is detected; the hub responds by disabling PRTPWR1. |
| 14 | CRFILT | passive | Core regulator filter capacitor pin. Optionally place a low-ESR capacitor up to 0.1 µF from this pin to VSS, or leave unconnected. |
| 15 | VDD33 | power_in | 3.3 V digital power supply input. |
| 16 | PRTPWR2/BC_EN2 | output | USB downstream port 2 power enable output (O12). Also BC_EN2 strap (IPD) sampled at RESET_N negation to enable battery-charging protocol for port 2. |
| 17 | OCS_N2 | input | Active-low over-current sense input for port 2 (IPU). |
| 18 | NC | unconnected | No Connect on USB2512B/12Bi. |
| 19 | NC | unconnected | No Connect on USB2512B/12Bi. |
| 20 | NC | unconnected | No Connect on USB2512B/12Bi. |
| 21 | NC | unconnected | No Connect on USB2512B/12Bi. |
| 22 | SDA/SMBDATA/NON_REM1 | bidirectional | I2C serial data (SDA) when configured as I2C EEPROM master, or SMBus data (SMBDATA) when configured as SMBus slave (I/OSD12 open-drain, Schmitt input, 12 mA sink; needs external pull-up). When strap-option config is used it becomes NON_REM1, sampled at RESET_N negation with NON_REM0 to mark ports as non-removable. |
| 23 | VDD33 | power_in | 3.3 V digital power supply input. |
| 24 | SCL/SMBCLK/CFG_SEL0 | bidirectional | I2C serial clock (SCL) when I2C EEPROM configuration is used, or SMBus clock (SMBCLK) when configured as SMBus slave (I/OSD12 open-drain, needs external pull-up). Also latched as CFG_SEL0 configuration-select strap on the rising edge of RESET_N. |
| 25 | HS_IND/CFG_SEL1 | bidirectional | Hi-Speed upstream port indicator (I/O12): asserted when the hub upstream port is enumerated at High Speed, negated when Full Speed. Also latched at RESET_N negation as CFG_SEL1 configuration-select strap. |
| 26 | RESET_N | input | Active-low reset input (IS, Schmitt trigger). Drive low for a minimum of 1 µs to reset the device; strap pins are sampled on the rising edge (negation). |
| 27 | VBUS_DET | input | Upstream VBUS power detection input. Used by the hub to gate the internal upstream D+ pull-up (connect signaling). For detachable hubs, tie to upstream VBUS via a 2:1 divider using two 100 kΩ resistors; for self-powered permanently-attached hosts, tie to a dedicated host output or to the 3.3 V rail powering the host (typically VDD33). |
| 28 | SUSP_IND/LOCAL_PWR/NON_REM0 | bidirectional | Multifunction status pin (I/O). SUSP_IND: hub active/suspend status LED (asserted = configured and active). LOCAL_PWR: input indicating local self-power availability (high = local power present). NON_REM0: strap sampled with NON_REM1 at RESET_N negation to mark ports as non-removable/compound-device. |
| 29 | VDDA33 | power_in | 3.3 V analog power supply input. |
| 30 | USBDM_UP | bidirectional | Upstream USB 2.0 data D- (I/O-U analog USB transceiver). Connect to the host / upstream hub USB D- line. |
| 31 | USBDP_UP | bidirectional | Upstream USB 2.0 data D+ (I/O-U). Connect to the host / upstream hub USB D+ line. |
| 32 | XTALOUT | output | 24 MHz crystal driver output (OCLKx, ~1.2 Vpp, <1 mA drive). Other terminal of the crystal circuit; leave unconnected when driving XTALIN from an external 24 MHz clock. |
| 33 | XTALIN/CLKIN | input | 24 MHz crystal input (ICLKx) or external 24 MHz clock input. One terminal of the reference crystal, or driven directly by an external 24 MHz oscillator. |
| 34 | PLLFILT | passive | PLL regulator filter capacitor pin. Optionally place a low-ESR capacitor up to 0.1 µF from this pin to VSS, or leave unconnected. |
| 35 | RBIAS | passive | USB transceiver bias-current setting resistor. Connect a 12.0 kΩ ±1% resistor from this pin to ground to set the internal USB transceiver bias. |
| 36 | VDDA33 | power_in | 3.3 V analog power supply input. |
| EP | VSS | power_in | Exposed thermal pad (ePad) / device ground slug. This pad is the only VSS connection for the device and must be tied to system ground with multiple vias. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TQFN-36-EP(6x6) |
| Category | Interface |
| Pins | 37 |
Ordering variants
Same part, different packaging or reel option.
USB2512BI-AEZG-TRUSB2512BI-AEZG-TR/M2USB2512BI-AEZG-TRT-I/M2
CAD (KiCad official)
- Symbol:
USB2512BI-AEZG-TR - Footprint:
Package_DFN_QFN:QFN-36-1EP_6x6mm_P0.5mm_EP3.7x3.7mm - 3D model: TQFN-36-EP(6x6) (KiCad packages3D, STEP)
- 3D model files:
usb2512bi-aezg-tr-etched.step/usb2512bi-aezg-tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);usb2512bi-aezg-tr.step/usb2512bi-aezg-tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (57 pp, sha256
3fca1a17701a3fd5, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).