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usb2512b-i-etched.step	usb2512b-i: factory component page (tier=mfr) · Ray	8d ago
usb2512b-i-hero.glb	usb2512b-i: hero GLB from the etched model (keeps the MPN mark) · Ray	8d ago
usb2512b-i-hero.overlay.json	Publish 0.1.0 · Ray	8d ago
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usb2512b-i.step	Publish 0.1.0 · Ray	8d ago

USB2512B-I

Microchip Tech · USB ICs · TQFN-36-EP(6x6)

USB2512B-I from Microchip Tech, in a TQFN-36-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	USBDM_DN1/PRT_DIS_M1	bidirectional	Downstream port 1 hi-speed USB D- data, also the port 1 disable strap sampled at RESET_N negation (pull up with 10 kΩ to 3.3 V together with PRT_DIS_P1 to disable the port).
2	USBDP_DN1/PRT_DIS_P1	bidirectional	Downstream port 1 hi-speed USB D+ data, also the port 1 disable strap sampled at RESET_N negation (pull up with 10 kΩ to 3.3 V together with PRT_DIS_M1 to disable the port).
3	USBDM_DN2/PRT_DIS_M2	bidirectional	Downstream port 2 hi-speed USB D- data, also the port 2 disable strap sampled at RESET_N negation (pull up with 10 kΩ to 3.3 V together with PRT_DIS_P2 to disable the port).
4	USBDP_DN2/PRT_DIS_P2	bidirectional	Downstream port 2 hi-speed USB D+ data, also the port 2 disable strap sampled at RESET_N negation (pull up with 10 kΩ to 3.3 V together with PRT_DIS_M2 to disable the port).
5	VDDA33	power_in	3.3 V analog power supply.
6	NC	unconnected	No connect on the USB2512B; no signal or trace should be routed or attached.
7	NC	unconnected	No connect on the USB2512B; no signal or trace should be routed or attached.
8	NC	unconnected	No connect on the USB2512B; no signal or trace should be routed or attached.
9	NC	unconnected	No connect on the USB2512B; no signal or trace should be routed or attached.
10	VDDA33	power_in	3.3 V analog power supply.
11	TEST	input	Test pin with internal pull-down; treat as no connect or connect to ground, and route no trace or signal to it.
12	PRTPWR1/BC_EN1	bidirectional	Port 1 USB power enable output (12 mA drive), also the battery charging strap with internal pull-down sampled at RESET_N negation (1 = battery charging supported on port 1).
13	OCS_N1	input	Port 1 over-current sense input from an external current monitor, with internal pull-up.
14	CRFILT	passive	Core regulator filter capacitor pin; may have up to a 0.1 µF low-ESR capacitor to VSS or be left unconnected.
15	VDD33	power_in	3.3 V digital power supply.
16	PRTPWR2/BC_EN2	bidirectional	Port 2 USB power enable output (12 mA drive), also the battery charging strap with internal pull-down sampled at RESET_N negation (1 = battery charging supported on port 2).
17	OCS_N2	input	Port 2 over-current sense input from an external current monitor, with internal pull-up.
18	NC	unconnected	No connect on the USB2512B; no signal or trace should be routed or attached.
19	NC	unconnected	No connect on the USB2512B; no signal or trace should be routed or attached.
20	NC	unconnected	No connect on the USB2512B; no signal or trace should be routed or attached.
21	NC	unconnected	No connect on the USB2512B; no signal or trace should be routed or attached.
22	SDA/SMBDATA/NON_REM1	bidirectional	Serial data for I2C EEPROM or SMBus data, also the non-removable port strap bit 1 sampled with NON_REM0 at RESET_N negation (use 47-100 kΩ for strap high).
23	VDD33	power_in	3.3 V digital power supply.
24	SCL/SMBCLK/CFG_SEL0	bidirectional	Serial clock for I2C EEPROM or SMBus clock, also configuration select 0 latched at RESET_N negation to determine the hub configuration method.
25	HS_IND/CFG_SEL1	bidirectional	Hi-speed upstream port indicator (asserted when connected at HS, negated at FS), also configuration select 1 latched at RESET_N negation.
26	RESET_N	input	Reset input; driving it low resets the chip, with a minimum active low pulse of 1 µs.
27	VBUS_DET	input	Detects upstream VBUS power to control the internal D+ pull-up; use a 2:1 divider (two 100 kΩ suggested) from VBUS for detachable hubs, or a host control output or the host 3.3 V domain for self-powered permanently attached hosts.
28	SUSP_IND/LOCAL_PWR/NON_REM0	bidirectional	Active/suspend status LED output, local self-power detect input (low = no local power, high = available), and non-removable port strap bit 0 sampled at RESET_N negation.
29	VDDA33	power_in	3.3 V analog power supply.
30	USBDM_UP	bidirectional	Upstream USB D- data connecting to the host, port, or upstream hub.
31	USBDP_UP	bidirectional	Upstream USB D+ data connecting to the host, port, or upstream hub.
32	XTALOUT	output	Crystal output, the other crystal terminal, with 1.2 V p-p output and weak (<1 mA) drive; leave unconnected when an external clock drives XTALIN/CLKIN.
33	XTALIN/CLKIN	input	24 MHz crystal input or external 24 MHz clock input when a crystal is not used.
34	PLLFILT	passive	PLL regulator filter capacitor pin; may have up to a 0.1 µF low-ESR capacitor to VSS or be left unconnected.
35	RBIAS	input	USB transceiver bias; a 12.0 kΩ (±1%) resistor is connected from ground to this pin.
36	VDDA33	power_in	3.3 V analog power supply.
37	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	Microchip Tech
Package	TQFN-36-EP(6x6)
Category	Communication Interface Chip/UART/485/232
Pins	37

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
3.3 V supply voltage	VDD33, VDDA33	3		3.6	V	Applies to all parts	39
Industrial operating temperature	TAI	-40		85	°C	Ambient temperature in still air; USB251xBi products	39
3.3 V supply rise time	tRT33	0		400	µs	See Figure 6-1 and Note 6-2	39
Voltage on any I/O pin		-0.3		5.5	V	If any 3.3 V supply drops below 3.0 V, max becomes (3.3 V supply voltage) + 0.5	39
Voltage on XTALIN		-0.3		3.6	V	Max printed as VDD33	39
Storage temperature	TSTOR	-55		150	°C		39
3.3 V supply voltage	VDD33, VDDA33			4.6	V	Applies to all packages	39
Voltage on any I/O pin		-0.5		5.5	V		39
Voltage on XTALIN		-0.5		4	V		39
Voltage on XTALOUT		-0.5		2.5	V		39
Low input level (I, IS)	VILI			0.8	V	TTL levels	40
High input level (I, IS)	VIHI	2			V	TTL levels	40
Input leakage (I, IS)	IIL	-10		10	µA	VIN = 0 to VDD33	40
Hysteresis (IS only)	VHYSI	250		350	mV		40
ICLK low input level	VILCK			0.3	V		40
ICLK high input level	VIHCK	0.9			V		40
ICLK input leakage	IIL	-10		10	µA	VIN = 0 to VDD33	40
Low output level (O12, I/O12, I/OSD12)	VOL			0.4	V	IOL = 12 mA @ VDD33 = 3.3 V	41
High output level (O12, I/O12, I/OSD12)	VOH	2.4			V	IOH = -12 mA @ VDD33 = 3.3 V	41
Output leakage	IOL	-10		10	µA		41
Hysteresis (SD pad only)	IHYSC	250		350	mV	VIN = VDD33	41
Supply current unconfigured, Hi-Speed host	ICCINTHS		40	45	mA	USB2512B/12Bi	41
Supply current unconfigured, Full-Speed host	ICCINTFS		35	40	mA	USB2512B/12Bi	41
Supply current configured, Hi-Speed host	IHCH1		60	70	mA	USB2512Bi; base current of one downstream port	41
Supply current configured, Full-Speed host	IFCC1		45	55	mA	USB2512Bi; base current of one downstream port	42
Supply current suspend	ICSBY		475	1200	µA	USB2512Bi; all supplies combined	42
Supply current reset	ICRST		550	1250	µA	USB2512Bi; all supplies combined	42
Clock input capacitance	CXTAL			6	pF	All pins except USB pins and the pins under test tied to AC ground	42
Input capacitance	CIN			6	pF	TA = 25°C; fc = 1 MHz; VDD33 = 3.3 V	42
Output capacitance	COUT			6	pF		42
RESET_N asserted	t1	1			µs	Strapping option configuration	36
CFG_SEL[1:0] setup time	t2	16.7			ns		36
CFG_SEL[1:0] hold time	t3	16.7		1400	ns		36
Crystal frequency tolerance		-350		350	ppm	Parallel resonant, fundamental mode, 24 MHz	44

CAD (KiCad official)

Symbol: USB2512B-I
Footprint: Package_DFN_QFN:QFN-36-1EP_6x6mm_P0.5mm_EP3.7x3.7mm
3D model: TQFN-36-EP(6x6) (KiCad packages3D, STEP)
3D model files: usb2512b-i-etched.step / usb2512b-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); usb2512b-i.step / usb2512b-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Microchip Tech datasheet (57 pp, sha256 3fca1a17701a3fd5, retrieved 2026-10-23, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF