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USB2422-I

Public Made by Adom

by adom

Microchip Tech USB ICs, QFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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PCB Footprint

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Datasheet

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Contents

README

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USB2422-I

Microchip Tech · USB ICs · QFN-24-EP(4x4)

USB2422-I from Microchip Tech, in a QFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD33 power_in 3.3 V power to the chip; a 0.1 µF low-ESR capacitor to VSS is required as close as possible to the pin.
2 USBDM_DN1/PRT_DIS_M1 bidirectional Downstream port 1 Hi-Speed USB data minus, also port disable strap sampled at RESET_N negation (both port data pins tied to VDD33 disable the port).
3 USBDP_DN1/PRT_DIS_P1 bidirectional Downstream port 1 Hi-Speed USB data plus, also port disable strap sampled at RESET_N negation (both port data pins tied to VDD33 disable the port).
4 USBDM_DN2/PRT_DIS_M2 bidirectional Downstream port 2 Hi-Speed USB data minus, also port disable strap sampled at RESET_N negation (both port data pins tied to VDD33 disable the port).
5 USBDP_DN2/PRT_DIS_P2 bidirectional Downstream port 2 Hi-Speed USB data plus, also port disable strap sampled at RESET_N negation (both port data pins tied to VDD33 disable the port).
6 NC unconnected Treat as a no-connect pin or connect to ground; no trace or signal should be routed or attached to it.
7 PRTPWR1/BC_EN1 output Port 1 USB power enable (O12, active-high power controllers only); also battery charging strap (internal pull-down) sampled at RESET_N negation, 1 enables battery charging on port 1.
8 OCS1_N input Port 1 over-current sense input from external current monitor, with internal pull-up to the 3.3 V supply.
9 VDD33 power_in 3.3 V power to the chip; a 1.0 µF low-ESR capacitor to VSS is required as close as possible to the pin.
10 CRFILT passive Core regulator filter capacitor pin; requires a 1.0 µF low-ESR capacitor to VSS.
11 PRTPWR2 output Port 2 USB power enable (O12, active-high power controllers only).
12 OCS2_N input Port 2 over-current sense input from external current monitor, with internal pull-up to the 3.3 V supply.
13 SMBDATA/NON_REM1 bidirectional SMBus data (I/OSD12), also non-removable port strap NON_REM1 sampled with NON_REM0 at RESET_N negation.
14 SMBCLK/CFG_SEL0 bidirectional SMBus clock (I/OSD12), also configuration select latched on RESET_N negation: 0 = default strap configuration, 1 = configured over SMBus.
15 RESET_N input Schmitt-trigger reset input, active low; the minimum active low pulse is 1 µs.
16 VBUS_DET input Detects upstream VBUS power to decide when to assert the internal D+ pull-up; connect to VBUS via a 2:1 divider (two 100 kΩ suggested) or to a host control output/VDD33 for self-powered use.
17 SUSP_IND/LOCAL_PWR/NON_REM0 bidirectional Suspend indicator (I/O12) or local power input when configured via SMBus, and non-removable strap NON_REM0 sampled at RESET_N negation; never tie directly to VDD33.
18 VDD33 power_in 3.3 V power to the chip.
19 USBDM_UP bidirectional Upstream USB data minus; connect to the upstream USB bus (host, port, or upstream hub).
20 USBDP_UP bidirectional Upstream USB data plus; connect to the upstream USB bus (host, port, or upstream hub).
21 XTALOUT output Crystal output with 1.2 V p-p and weak (<1 mA) drive; leave unconnected when an external clock drives XTALIN/CLKIN.
22 XTALIN/CLKIN input 24 MHz crystal terminal or external 24 MHz clock input when no crystal is used.
23 PLLFILT passive PLL regulator filter capacitor pin; can have up to a 0.1 µF low-ESR capacitor to VSS or be left unconnected.
24 RBIAS passive USB transceiver bias; a 12.0 kΩ (+/-1%) resistor is attached from ground to this pin.
25 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package QFN-24-EP(4x4)
Category Interface ICs
Pins 25

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Storage Temperature TSTOR -55 150 °C 35
3.3 V supply voltage (absolute maximum) VDD33 4.6 V 35
Voltage on any I/O pin (absolute maximum) -0.5 5.5 V 35
Voltage on XTALIN (absolute maximum) -0.5 4 V 35
Voltage on XTALOUT (absolute maximum) -0.5 2.5 V 35
USB2422-i Operating Temperature TA -40 85 °C Ambient temperature in still air 35
3.3 V supply voltage VDD33 3 3.6 V 35
3.3 V supply rise time tRT33 0 400 μs See Figure 5-1 35
Voltage on any I/O pin (recommended) -0.3 5.5 V If any 3.3 V supply drops below 3.0 V, MAX becomes (3.3 V supply voltage) + 0.5 35
Voltage on XTALIN (recommended) -0.3 V Printed max is VDD12 + 0.3 (not a numeric value in the text) 35
I, IS input buffer low input level VILI 0.8 V TTL levels 36
I, IS input buffer high input level VIHI 2 V 36
I, IS input leakage IIL -10 10 μA VIN = 0 to VDD33 36
IS input hysteresis VHYSI 250 350 mV IS only 36
IPU input buffer low input level VILI 0.8 V TTL levels 36
IPU input buffer high input level VIHI 2 V 36
IPU input buffer low input leakage IILL 35 90 μA VIN = 0 36
IPU input buffer high input leakage IIHL -10 10 μA VIN = VDD33 36
IPD input buffer low input level VILI 0.8 V TTL levels 36
IPD input buffer high input level VIHI 2 V 36
IPD input buffer low input leakage (as printed +10 / -10) IILL 10 -10 μA VIN = 0 36
IPD input buffer high input leakage (as printed) IIHL -35 -90 μA VIN = VDD33 36
ICLK input buffer low input level VILCK 0.3 V 36
ICLK input buffer high input level VIHCK 0.9 V 36
ICLK input leakage IIL -10 10 μA VIN = 0 to VDD33 36
O12, I/O12, I/OSD12 low output level VOL 0.4 V IOL = 12 mA @ VDD33 = 3.3 V 37
O12, I/O12, I/OSD12 high output level VOH 2.4 V IOH = -12 mA @ VDD33 = 3.3 V 37
O12, I/O12, I/OSD12 output leakage IOL -10 10 μA 37
SD pad hysteresis VHYSC 250 350 mV VIN = VDD33 37
Supply current, unconfigured, Hi-Speed host ICCINTHS 40 45 mA 37
Supply current, Hi-Speed host, each additional downstream port ICCINTFS 35 40 mA Note 5-8: peak USB traffic, not average draw 37
Supply current, Hi-Speed host, 1 downstream port IHCH1 47 58 mA Note 5-8: peak USB traffic, not average draw 37
Supply current, Hi-Speed host, 2 downstream ports IHCH2 70 89 mA Note 5-8: peak USB traffic, not average draw 37
Supply current, Full-Speed host, 1 downstream port IFCC1 29 40 mA Note 5-8: peak USB traffic, not average draw 37
Supply current, Full-Speed host, 2 downstream ports IFCC2 35 45 mA Note 5-8: peak USB traffic, not average draw 37
Supply current, suspend ICSBY 425 1200 μA Note 5-6: 1200 μA for industrial temperature part 37
Supply current, reset ICRST 300 1000 μA Note 5-7: 1000 μA for industrial temperature part 37
Clock input capacitance CXTAL 6 pF All pins except USB pins and the pins under the test tied to AC ground 37
Input capacitance CIN 6 pF TA = 25°C, fc = 1 MHz, VDD33 = 3.3 V 37
Output capacitance COUT 6 pF 37
Crystal frequency tolerance (24 MHz) -350 350 ppm External crystal, parallel resonant, fundamental mode, 24 MHz 38
External clock frequency tolerance (24 MHz) -350 350 ppm External 24 MHz clock input 39
External clock duty cycle tolerance -10 10 % External clock, 50% nominal duty cycle 39
Hub configuration: RESET_N assertion time t1 1 μsec Minimum of 1 μs after power supplies are within operating range 17
Hub configuration: strap setup time t2 16.7 nsec 17
Hub configuration: strap hold time t3 16.7 1400 nsec 17
Hub configuration: hub outputs driven to inactive states t4 1.5 2 μsec 17
Hub configuration: USB attach t5 3 μsec See Note: all supplies at operating levels before or at RESET_N assertion 17
Hub configuration: host acknowledges attach and signals USB reset t6 100 msec 17
Hub configuration: completion time for requests t8 5 msec With or without data stage 17

CAD (KiCad official)

  • Symbol: USB2422-I
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
  • 3D model: QFN-24-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: usb2422-i-etched.step / usb2422-i-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); usb2422-i.step / usb2422-i.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (47 pp, sha256 4a9ad71cd6535368, retrieved 2026-10-29, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF