component
US1K-E3
Public Made by Adomby adom
Vishay Intertech High Effic Rectifier, DO-214AC. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 2d ago |
| viewers | 2d ago |
| package.json | 2d ago |
| page.json | 2d ago |
| README.md | 2d ago |
| us1k-e3-etched.glb | 2d ago |
| us1k-e3-etched.step | 2d ago |
| us1k-e3-hero.glb | 2d ago |
| us1k-e3-hero.overlay.json | 2d ago |
| us1k-e3.glb | 2d ago |
| us1k-e3.kicad_mod | 2d ago |
| us1k-e3.kicad_sym | 2d ago |
| us1k-e3.lbr | 2d ago |
| us1k-e3.step | 2d ago |
US1K-E3
Vishay Intertech · High Effic Rectifier · DO-214AC
US1K-E3 from Vishay Intertech, in a DO-214AC. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | K | passive | Cathode end of the rectifier, identified by the color band on the package; the datasheet's SMA (DO-214AC) diagram labels the two terminals Cathode and Anode. |
| 2 | A | passive | Anode terminal of the rectifier, opposite the cathode band end; the US1K is rated 800 V VRRM, 1.0 A IF(AV) and 30 A IFSM. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Vishay Intertech |
| Package | DO-214AC |
| Category | Diodes |
| Pins | 2 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Maximum repetitive peak reverse voltage | VRRM | 800 | V | TA = 25 °C | 1 | ||
| Maximum RMS voltage | VRMS | 560 | V | TA = 25 °C | 1 | ||
| Maximum DC blocking voltage | VDC | 800 | V | TA = 25 °C | 1 | ||
| Maximum average forward rectified current | IF(AV) | 1 | A | TL = 110 °C | 1 | ||
| Peak forward surge current | IFSM | 30 | A | 8.3 ms single half sine-wave superimposed on rated load | 1 | ||
| Operating and storage temperature range | TJ, TSTG | -55 | 150 | °C | 1 | ||
| Maximum instantaneous forward voltage | VF | 1.7 | V | 1.0 A, TA = 25 °C | 2 | ||
| Maximum DC reverse current | IR | 10 | μA | at rated DC blocking voltage, TA = 25 °C | 2 | ||
| Maximum DC reverse current | IR | 50 | μA | at rated DC blocking voltage, TA = 100 °C | 2 | ||
| Maximum reverse recovery time | trr | 75 | ns | IF = 0.5 A, IR = 1.0 A, Irr = 0.25 A | 2 | ||
| Maximum thermal resistance junction to ambient | RθJA | 75 | °C/W | PCB mounted on 0.2" x 0.2" (5.0 mm x 5.0 mm) copper pad area | 2 | ||
| Maximum thermal resistance junction to lead | RθJL | 27 | °C/W | PCB mounted on 0.2" x 0.2" (5.0 mm x 5.0 mm) copper pad area | 2 | ||
| Typical junction capacitance | CJ | 10 | pF | 4.0 V, 1 MHz | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | Terminals: matte tin plated leads, solderable per J-STD-002 and JESD 22-B102 | 1 |
CAD (KiCad official)
- Symbol:
US1K-E3 - Footprint:
Diode_SMD:D_SMA - 3D model: DO-214AC (KiCad packages3D, STEP)
- 3D model files:
us1k-e3-etched.step/us1k-e3-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);us1k-e3.step/us1k-e3.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Vishay Intertech datasheet (5 pp, sha256
ce85b7c4a6724d13, retrieved 2026-10-22, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).