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Contents

README

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US1D-E3

Vishay Intertech · Diodes - Fast Recovery Rectifiers · SMA(DO-214AC)

US1D-E3 from Vishay Intertech, in a SMA(DO-214AC). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 K passive Cathode, the end marked by the color band on the SMA (DO-214AC) package; the diode blocks up to 200 V (VRRM/VDC for US1D).
2 A passive Anode, the end opposite the cathode color band; US1D conducts 1.0 A average forward current (IF(AV)) at TL = 110 °C.

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package SMA(DO-214AC)
Category Diodes
Pins 2

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Maximum repetitive peak reverse voltage VRRM 200 V TA = 25 °C 1
Maximum RMS voltage VRMS 140 V TA = 25 °C 1
Maximum DC blocking voltage VDC 200 V TA = 25 °C 1
Maximum average forward rectified current IF(AV) 1 A TL = 110 °C 1
Peak forward surge current IFSM 30 A 8.3 ms single half sine-wave superimposed on rated load 1
Operating and storage temperature range TJ, TSTG -55 150 °C 1
Maximum instantaneous forward voltage VF 1 V IF = 1.0 A, TA = 25 °C, pulse test 300 μs, 1 % duty cycle 2
Maximum DC reverse current IR 10 μA At rated DC blocking voltage, TA = 25 °C 2
Maximum DC reverse current IR 50 μA At rated DC blocking voltage, TA = 100 °C 2
Maximum reverse recovery time trr 50 ns IF = 0.5 A, IR = 1.0 A, Irr = 0.25 A 2
Typical junction capacitance CJ 15 pF 4.0 V, 1 MHz 2
Maximum thermal resistance junction to ambient RθJA 75 °C/W PCB mounted on 0.2" x 0.2" (5.0 mm x 5.0 mm) copper pad area 2
Maximum thermal resistance junction to lead RθJL 27 °C/W PCB mounted on 0.2" x 0.2" (5.0 mm x 5.0 mm) copper pad area 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin Terminals: matte tin plated leads, solderable per J-STD-002 and JESD 22-B102 1

CAD (KiCad official)

  • Symbol: US1D-E3
  • Footprint: Diode_SMD:D_SMA
  • 3D model: SMA(DO-214AC) (KiCad packages3D, STEP)
  • 3D model files: us1d-e3-etched.step / us1d-e3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); us1d-e3.step / us1d-e3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (5 pp, sha256 39bb7d4a2d9fc276, retrieved 2026-10-22, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF