component
UMD10N
Public Made by Adomby adom
LGE Digital Transistors, SOT-363. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownUMD10N
LGE · Digital Transistors · SOT-363
UMD10N from LGE, in a SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | E1 | passive | Emitter (ground side) of NPN digital transistor DTr1 (DTC123J), connected to R2 of the internal bias network; Tr1 supply voltage max 50 V. |
| 2 | IN1 | input | Input of DTr1 (DTC123J) through internal R1 (1.54 to 2.86 kΩ, typ 2.2 kΩ); input voltage -5 to +12 V, VI(on) max 1.1 V. |
| 3 | OUT2 | passive | Output (collector) of PNP digital transistor DTr2 (DTA123J); output current up to -100 mA, VCC -50 V. |
| 4 | E2 | passive | Emitter of DTr2 (DTA123J), connected to R2 of the internal bias network; supply voltage rating -50 V. |
| 5 | IN2 | input | Input of DTr2 (DTA123J) through internal R1 (1.54 to 2.86 kΩ, typ 2.2 kΩ); input voltage +5 to -12 V, VI(on) max -1.1 V. |
| 6 | OUT1 | passive | Output (collector) of DTr1 (DTC123J); output current up to 100 mA, VCC 50 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | LGE |
| Package | SOT-363 |
| Category | Transistors/Thyristors |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| TR1 Input Voltage VI(off) | VI(off) | 0.5 | V | VCC=5V, IO=100uA | 2 | ||
| TR1 Input Voltage VI(on) | VI(on) | 1.1 | V | VO=0.3V, IO=5mA | 2 | ||
| TR1 Output Voltage VO(on) | VO(on) | 0.1 | 0.3 | V | Io=5mA, II=0.25mA | 2 | |
| TR1 Input Current II | II | 3.6 | mA | VI=5V | 2 | ||
| TR1 Output Current IO(off) | IO(off) | 0.5 | uA | VCC=50V, VI=0V | 2 | ||
| TR1 DC Current Gain GI | GI | 80 | - | VO=5V, IO=10mA | 2 | ||
| TR1 Input Resistor R1 | R1 | 1.54 | 2.2 | 2.86 | kΩ | 2 | |
| TR1 Resistance ratio R2/R1 | R2/R1 | 17 | 21 | 26 | 2 | ||
| TR1 Resistance Ratio Tolerance ΔR2/R1 | ΔR2/R1 | -20 | 20 | % | 2 | ||
| TR2 Input Voltage VI(off) | VI(off) | -0.5 | V | VCC=-5V, IO=-100uA | 2 | ||
| TR2 Input Voltage VI(on) | VI(on) | -1.1 | V | VO=-0.3V, IO=-5mA | 2 | ||
| TR2 Output Voltage VO(on) | VO(on) | -0.1 | -0.3 | V | Io=-5mA, II=-0.25mA | 2 | |
| TR2 Input Current II | II | -3.6 | mA | VI=-5V | 2 | ||
| TR2 Output Current IO(off) | IO(off) | -0.5 | uA | VCC=-50V, VI=0V | 2 | ||
| TR2 DC Current Gain GI | GI | 80 | - | VO=-5V, IO=-10mA | 2 | ||
| TR2 Input Resistor R1 | R1 | 1.54 | 2.2 | 2.86 | kΩ | 2 | |
| TR2 Resistance ratio R2/R1 | R2/R1 | 17 | 21 | 26 | 2 | ||
| TR2 Resistance Ratio Tolerance ΔR2/R1 | ΔR2/R1 | -20 | 20 | % | 2 | ||
| TR1 Supply Voltage | VCC | 50 | V | 1 | |||
| TR2 Supply Voltage | VCC | -50 | V | 1 | |||
| TR1 Input Voltage | VIN | -5 | 12 | V | 1 | ||
| TR2 Input Voltage | VIN | -12 | 5 | V | 1 | ||
| TR1 Output Current | IO | 100 | mA | 1 | |||
| TR2 Output Current | IO | -100 | mA | 1 | |||
| TR1 Collector Current | IC | 100 | mA | 1 | |||
| TR2 Collector Current | IC | -100 | mA | 1 | |||
| Total Power Dissipation | Ptot | 0.2 | W | Ta≤25℃ | 1 | ||
| Junction Temperature | TJ | -55 | 150 | ℃ | 1 | ||
| Storage Temperature Range | TSTG | -55 | 150 | ℃ | 1 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | Terminals: Matte tin plated leads, solderable per MIL-STD-202, Method 208. | 1 |
CAD (KiCad official)
- Symbol:
UMD10N - Footprint:
Package_TO_SOT_SMD:SOT-363_SC-70-6 - 3D model: SOT-363 (KiCad packages3D, STEP)
- 3D model files:
umd10n-etched.step/umd10n-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);umd10n.step/umd10n.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: LGE datasheet (5 pp, sha256
1122721696d2fcc6, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).