component
UM1770DA-00
Public Made by Adomby adom
Union Semiconductor Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, DFN-6-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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UM1770DA-00
Union Semiconductor · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · DFN-6-EP(2x2)
UM1770DA-00 from Union Semiconductor, in a DFN-6-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SHDN | input | Active-high shutdown input (High=activate LDO, Low=shutdown, VIL max 0.4V, VIH min 2.0V) that cannot be left floating and must be tied to VIN if unused. |
| 2 | GND | power_in | Ground and heat sink pin, to be soldered to a ground plane or large pad to maximize heat dissipation. |
| 3 | VIN | power_in | Power supply input for the device and load (2.5V to 6.0V), to be locally bypassed to ground. |
| 4 | VOUT | power_out | Regulated output supplying the load, requiring a minimum 1μF output capacitor for stability. |
| 5 | NC | unconnected | Not connected internally. |
| 6 | FB | input | Output voltage feedback input connected to an external resistor divider to set VOUT, with an internal reference VFB of 1.00V (typ). |
| 7 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Union Semiconductor |
| Package | DFN-6-EP(2x2) |
| Category | Power Management (PMIC) |
| Pins | 7 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage Range | VIN | 2.5 | 6 | V | 7 | ||
| Input Under Voltage Lockout | VUVLO | 1.8 | 2.4 | V | VIN Falling | 7 | |
| Operating Quiescent Current | IQ | 92 | 140 | μA | VIN=4.2V, IOUT=0mA | 7 | |
| Operating Quiescent Current | IQ | 250 | 300 | μA | VIN=4.2V, IOUT=500mA | 7 | |
| Shutdown Leakage Current | ISHDN | 1 | μA | 7 | |||
| Output Current | IOUT | 500 | mA | 7 | |||
| Output Voltage Accuracy | -2 | 2 | % | 1mA≤IOUT≤500mA, TA=-25°C | 7 | ||
| Dropout Voltage | ΔVDO | 220 | 320 | mV | IOUT=500mA, 2.5V≤VOUT | 7 | |
| SHDN Input Low Voltage | VIL | 0.4 | V | 2.5V≤VIN≤6.0V | 7 | ||
| SHDN Input High Voltage | VIH | 2 | V | 2.5V≤VIN≤6.0V | 7 | ||
| SHDN Input Current | -1 | 1 | μA | SHDN=VIN or GND | 7 | ||
| Supply Voltage on VIN Pin | VIN | -0.3 | 7.5 | V | 6 | ||
| Voltage on SHDN Pin | VSHDN | -0.3 | 7.5 | V | 6 | ||
| Voltage on VOUT Pin | VOUT | -0.3 | 7.5 | V | 6 | ||
| Voltage on FB Pin | VFB | -0.3 | 7.5 | V | 6 | ||
| Operating Junction Temperature | TJ | -40 | 125 | °C | 6 | ||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 6 | ||
| Lead Temperature for Soldering | TL | 300 | °C | 10 Seconds | 6 | ||
| Power Dissipation | PD | 0.9 | W | @ 25°C, DFN6 2.0×2.0 | 6 | ||
| Package Thermal Resistance | θJA | 110 | °C/W | DFN6 2.0×2.0 | 6 | ||
| Output Current Limit | ILIMT | 700 | mA | VIN≥2.5V | 7 | ||
| Startup Time Response | t | 40 | μs | RL=68Ω, COUT=1μF | 7 | ||
| Thermal-Shutdown Temperature | TSHDN | 160 | °C | 7 | |||
| Thermal-Shutdown Hysteresis | ΔTSHDN | 25 | °C | 7 | |||
| Line Regulation | 0.09 | %/V | VOUT+1V≤VIN≤6.0V (2.5V≤VIN), IOUT=10mA | 7 | |||
| Load Regulation | 0.2 | % | VIN=VOUT+1V (2.5V≤VIN), 1mA≤IOUT≤500mA | 7 | |||
| Output Voltage Noise | 60 | μVRMS | 10Hz to 100kHz, CIN=1.0μF, IOUT=100mA, Adjustable Output, VOUT=1.0V | 7 | |||
| Output Voltage Noise | 194 | μVRMS | 10Hz to 100kHz, CIN=1.0μF, IOUT=100mA, Adjustable Output, VOUT=3.3V | 7 | |||
| Output Voltage Noise | 305 | μVRMS | 10Hz to 100kHz, CIN=1.0μF, IOUT=100mA, Adjustable Output, VOUT=5.0V | 7 | |||
| Power Supply Ripple Rejection | PSRR | 65 | dB | VIN=VOUT+1V, IOUT=10mA, f=100Hz | 7 | ||
| Power Supply Ripple Rejection | PSRR | 60 | dB | VIN=VOUT+1V, IOUT=10mA, f=1kHz | 7 | ||
| Power Supply Ripple Rejection | PSRR | 45 | dB | VIN=VOUT+1V, IOUT=10mA, f=10kHz | 7 | ||
| Feedback Reference Voltage | VFB | 1 | V | internal reference voltage | 11 |
CAD (KiCad official)
- Symbol:
UM1770DA-00 - Footprint:
Package_DFN_QFN:DFN-6-1EP_2x2mm_P0.65mm_EP1x1.6mm - 3D model: DFN-6-EP(2x2) (KiCad packages3D, STEP)
- 3D model files:
um1770da-00-etched.step/um1770da-00-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);um1770da-00.step/um1770da-00.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Union Semiconductor datasheet (14 pp, sha256
d70c75382042de61, retrieved 2026-10-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# UM1770DA-00
**Union Semiconductor** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · DFN-6-EP(2x2)
UM1770DA-00 from Union Semiconductor, in a DFN-6-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SHDN | input | Active-high shutdown input (High=activate LDO, Low=shutdown, VIL max 0.4V, VIH min 2.0V) that cannot be left floating and must be tied to VIN if unused. |
| 2 | GND | power_in | Ground and heat sink pin, to be soldered to a ground plane or large pad to maximize heat dissipation. |
| 3 | VIN | power_in | Power supply input for the device and load (2.5V to 6.0V), to be locally bypassed to ground. |
| 4 | VOUT | power_out | Regulated output supplying the load, requiring a minimum 1μF output capacitor for stability. |
| 5 | NC | unconnected | Not connected internally. |
| 6 | FB | input | Output voltage feedback input connected to an external resistor divider to set VOUT, with an internal reference VFB of 1.00V (typ). |
| 7 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Union Semiconductor |
| Package | DFN-6-EP(2x2) |
| Category | Power Management (PMIC) |
| Pins | 7 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage Range | VIN | 2.5 | | 6 | V | | 7 |
| Input Under Voltage Lockout | VUVLO | | 1.8 | 2.4 | V | VIN Falling | 7 |
| Operating Quiescent Current | IQ | | 92 | 140 | μA | VIN=4.2V, IOUT=0mA | 7 |
| Operating Quiescent Current | IQ | | 250 | 300 | μA | VIN=4.2V, IOUT=500mA | 7 |
| Shutdown Leakage Current | ISHDN | | | 1 | μA | | 7 |
| Output Current | IOUT | 500 | | | mA | | 7 |
| Output Voltage Accuracy | | -2 | | 2 | % | 1mA≤IOUT≤500mA, TA=-25°C | 7 |
| Dropout Voltage | ΔVDO | | 220 | 320 | mV | IOUT=500mA, 2.5V≤VOUT | 7 |
| SHDN Input Low Voltage | VIL | | | 0.4 | V | 2.5V≤VIN≤6.0V | 7 |
| SHDN Input High Voltage | VIH | 2 | | | V | 2.5V≤VIN≤6.0V | 7 |
| SHDN Input Current | | -1 | | 1 | μA | SHDN=VIN or GND | 7 |
| Supply Voltage on VIN Pin | VIN | -0.3 | | 7.5 | V | | 6 |
| Voltage on SHDN Pin | VSHDN | -0.3 | | 7.5 | V | | 6 |
| Voltage on VOUT Pin | VOUT | -0.3 | | 7.5 | V | | 6 |
| Voltage on FB Pin | VFB | -0.3 | | 7.5 | V | | 6 |
| Operating Junction Temperature | TJ | -40 | | 125 | °C | | 6 |
| Storage Temperature Range | TSTG | -65 | | 150 | °C | | 6 |
| Lead Temperature for Soldering | TL | | | 300 | °C | 10 Seconds | 6 |
| Power Dissipation | PD | | | 0.9 | W | @ 25°C, DFN6 2.0×2.0 | 6 |
| Package Thermal Resistance | θJA | | 110 | | °C/W | DFN6 2.0×2.0 | 6 |
| Output Current Limit | ILIMT | | 700 | | mA | VIN≥2.5V | 7 |
| Startup Time Response | t | | 40 | | μs | RL=68Ω, COUT=1μF | 7 |
| Thermal-Shutdown Temperature | TSHDN | | 160 | | °C | | 7 |
| Thermal-Shutdown Hysteresis | ΔTSHDN | | 25 | | °C | | 7 |
| Line Regulation | | | 0.09 | | %/V | VOUT+1V≤VIN≤6.0V (2.5V≤VIN), IOUT=10mA | 7 |
| Load Regulation | | | 0.2 | | % | VIN=VOUT+1V (2.5V≤VIN), 1mA≤IOUT≤500mA | 7 |
| Output Voltage Noise | | | 60 | | μVRMS | 10Hz to 100kHz, CIN=1.0μF, IOUT=100mA, Adjustable Output, VOUT=1.0V | 7 |
| Output Voltage Noise | | | 194 | | μVRMS | 10Hz to 100kHz, CIN=1.0μF, IOUT=100mA, Adjustable Output, VOUT=3.3V | 7 |
| Output Voltage Noise | | | 305 | | μVRMS | 10Hz to 100kHz, CIN=1.0μF, IOUT=100mA, Adjustable Output, VOUT=5.0V | 7 |
| Power Supply Ripple Rejection | PSRR | | 65 | | dB | VIN=VOUT+1V, IOUT=10mA, f=100Hz | 7 |
| Power Supply Ripple Rejection | PSRR | | 60 | | dB | VIN=VOUT+1V, IOUT=10mA, f=1kHz | 7 |
| Power Supply Ripple Rejection | PSRR | | 45 | | dB | VIN=VOUT+1V, IOUT=10mA, f=10kHz | 7 |
| Feedback Reference Voltage | VFB | | 1 | | V | internal reference voltage | 11 |
## CAD (KiCad official)
- Symbol: `UM1770DA-00`
- Footprint: `Package_DFN_QFN:DFN-6-1EP_2x2mm_P0.65mm_EP1x1.6mm`
- 3D model: DFN-6-EP(2x2) (KiCad packages3D, STEP)
- 3D model files: `um1770da-00-etched.step` / `um1770da-00-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `um1770da-00.step` / `um1770da-00.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Union Semiconductor datasheet](docs/um1770da-00-datasheet.pdf) (14 pp, sha256 `d70c75382042de61`, retrieved 2026-10-22, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/um1770da-00-datasheet.pdf)