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ULQ2003AQDRQ1

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Texas Instruments Darlington Transistor Arrays, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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docs ulq2003aqdrq1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers ulq2003aqdrq1: viewers · Ray 1mo ago
package.json ulq2003aqdrq1: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 1mo ago
page.json ulq2003aqdrq1: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 1mo ago
README.md Initial commit: component/ulq2003aqdrq1 · Ray 1mo ago
ulq2003aqdrq1-etched.fit.json ulq2003aqdrq1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
ulq2003aqdrq1-etched.glb ulq2003aqdrq1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
ulq2003aqdrq1-etched.step ulq2003aqdrq1: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
ulq2003aqdrq1.glb Publish 0.1.0 · Ray 1mo ago
ulq2003aqdrq1.kicad_mod Publish 0.1.0 · Ray 1mo ago
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ulq2003aqdrq1.step Publish 0.1.0 · Ray 1mo ago

ULQ2003AQDRQ1

Texas Instruments · Darlington Transistor Arrays · SOIC-16

ULQ2003AQDRQ1 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1B input Channel 1 Darlington base input; accepts TTL/CMOS logic signals (2.7-3 V on-state voltage).
2 2B input Channel 2 Darlington base input; accepts TTL/CMOS logic signals (2.7-3 V on-state voltage).
3 3B input Channel 3 Darlington base input; accepts TTL/CMOS logic signals (2.7-3 V on-state voltage).
4 4B input Channel 4 Darlington base input; accepts TTL/CMOS logic signals (2.7-3 V on-state voltage).
5 5B input Channel 5 Darlington base input; accepts TTL/CMOS logic signals (2.7-3 V on-state voltage).
6 6B input Channel 6 Darlington base input; accepts TTL/CMOS logic signals (2.7-3 V on-state voltage).
7 7B input Channel 7 Darlington base input; accepts TTL/CMOS logic signals (2.7-3 V on-state voltage).
8 E power_in Common emitter terminal for all 7 channels; ground reference shared by all Darlington pairs (typically tied to ground).
9 COM power_in Common cathode node for internal flyback diodes; typically connected to the supply voltage for inductive load suppression.
10 7C output Channel 7 Darlington collector output; maximum 500 mA continuous per channel, maximum 50 V collector-emitter voltage.
11 6C output Channel 6 Darlington collector output; maximum 500 mA continuous per channel, maximum 50 V collector-emitter voltage.
12 5C output Channel 5 Darlington collector output; maximum 500 mA continuous per channel, maximum 50 V collector-emitter voltage.
13 4C output Channel 4 Darlington collector output; maximum 500 mA continuous per channel, maximum 50 V collector-emitter voltage.
14 3C output Channel 3 Darlington collector output; maximum 500 mA continuous per channel, maximum 50 V collector-emitter voltage.
15 2C output Channel 2 Darlington collector output; maximum 500 mA continuous per channel, maximum 50 V collector-emitter voltage.
16 1C output Channel 1 Darlington collector output; maximum 500 mA continuous per channel, maximum 50 V collector-emitter voltage.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16
Category Transistors/Thyristors
Pins 16

CAD (KiCad official)

  • Symbol: ULQ2003AQDRQ1
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: ulq2003aqdrq1-etched.step / ulq2003aqdrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ulq2003aqdrq1.step / ulq2003aqdrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (30 pp, sha256 6fffdfd21f42d5cc, retrieved 2026-09-18, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF