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ULN2003ALDTR-MS

Public Made by Adom

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MSKSEMI Darlington Transistor Arrays, SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Datasheet

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Contents

README

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ULN2003ALDTR-MS

MSKSEMI · Darlington Transistor Arrays · SOP-16

ULN2003ALDTR-MS from MSKSEMI, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1B input Base input of Darlington pair 1; inputs are pinned opposite their outputs to simplify board layout.
2 2B input Base input of Darlington pair 2; inputs are pinned opposite their outputs to simplify board layout.
3 3B input Base input of Darlington pair 3; inputs are pinned opposite their outputs to simplify board layout.
4 4B input Base input of Darlington pair 4; inputs are pinned opposite their outputs to simplify board layout.
5 5B input Base input of Darlington pair 5; inputs are pinned opposite their outputs to simplify board layout.
6 6B input Base input of Darlington pair 6; inputs are pinned opposite their outputs to simplify board layout.
7 7B input Base input of Darlington pair 7; inputs are pinned opposite their outputs to simplify board layout.
8 E power_in Common emitter of all seven pairs, serving as the ground/substrate reference; all voltages are measured with respect to this terminal.
9 COM passive Common node of the output clamp diodes used for inductive load suppression; the datasheet does not state the node's connection.
10 7C output Open-collector output of pair 7, rated 500 mA per output with 50 V collector-to-emitter voltage.
11 6C output Open-collector output of pair 6, rated 500 mA per output with 50 V collector-to-emitter voltage.
12 5C output Open-collector output of pair 5, rated 500 mA per output with 50 V collector-to-emitter voltage.
13 4C output Open-collector output of pair 4, rated 500 mA per output with 50 V collector-to-emitter voltage.
14 3C output Open-collector output of pair 3, rated 500 mA per output with 50 V collector-to-emitter voltage.
15 2C output Open-collector output of pair 2, rated 500 mA per output with 50 V collector-to-emitter voltage.
16 1C output Open-collector output of pair 1, rated 500 mA per output with 50 V collector-to-emitter voltage.

Key specifications

Parameter Value
Manufacturer MSKSEMI
Package SOP-16
Category Transistors/Thyristors
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VCC Collector to Emitter voltage VCC 50 V 5
Operating Ambient Temperature TA -40 105 ℃ 5
Collector to emitter voltage VCC 50 V 5
Clamp diode reverse voltage VR 50 V 5
Input voltage VI 30 V 5
Output clamp current IOK 500 mA 5
Total emitter-terminal current ITE -2.5 A 5
Operating free-air temperature range ULN2003Axxx-MS TA -40 105 °C 5
Thermal Resistance Junction-to-Ambient θJA 63 °C/W 5
Thermal Resistance Junction-to-Case θJC 12 °C/W 5
Operating virtual junction temperature TJ 150 °C 5
Storage temperature range TSTG -65 150 °C 5
ESD Human Body Model ESD 3000 V 5
On-state input voltage VI(on) 2.4 V VCE = 2 V, IC = 200 mA 6
On-state input voltage VI(on) 2.7 V VCE = 2 V, IC = 250 mA 6
On-state input voltage VI(on) 3 V VCE = 2 V, IC = 300 mA 6
Collector-emitter saturation voltage VCE(sat) 0.9 1.1 V II = 250 μA, IC = 100 mA 6
Collector-emitter saturation voltage VCE(sat) 1 1.3 V II = 350 μA, IC = 200 mA 6
Collector-emitter saturation voltage VCE(sat) 1.2 1.6 V II = 500 μA, IC = 350 mA 6
Collector cutoff current ICEX 50 μA VCE = 50 V, II = 0 6
Collector cutoff current ICEX 100 μA VCE = 50 V, TA = +105°C, II = 0 6
Clamp forward voltage VF 1.7 2 V IF = 350 mA 6
Off-state input current II(off) 50 65 μA VCE = 50 V, IC = 500 μA 6
Input current II 0.93 1.35 mA VI = 3.85 V 6
Clamp reverse current IR 50 μA VR = 50 V 6
Clamp reverse current IR 100 μA TA = 70°C 6
Input capacitance Ci 15 25 pF VI = 0, f = 1 MHz 6
Propagation delay time, low- to high-level output tPLH 0.25 1 μs See Figure 9 6
Propagation delay time, high- to low-level output tPHL 0.25 1 μs See Figure 9 6

CAD (KiCad official)

  • Symbol: ULN2003ALDTR-MS
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOP-16 (KiCad packages3D, STEP)
  • 3D model files: uln2003aldtr-ms-etched.step / uln2003aldtr-ms-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); uln2003aldtr-ms.step / uln2003aldtr-ms.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: MSKSEMI datasheet (12 pp, sha256 bd2daafce94fcd8d, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF