main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 12d ago
viewers udt26a05l05: viewers · Ray 12d ago
package.json Publish 0.1.0 · Ray 12d ago
page.json Set visibility: public · Ray 12d ago
README.md Publish 0.1.0 · Ray 12d ago
udt26a05l05-etched.glb Publish 0.1.0 · Ray 12d ago
udt26a05l05-etched.step udt26a05l05: factory component page (tier=lcsc) · Ray 12d ago
udt26a05l05-hero.glb udt26a05l05: hero GLB from the etched model (keeps the MPN mark) · Ray 12d ago
udt26a05l05-hero.overlay.json Publish 0.1.0 · Ray 12d ago
udt26a05l05.glb Publish 0.1.0 · Ray 12d ago
udt26a05l05.kicad_mod Publish 0.1.0 · Ray 12d ago
udt26a05l05.kicad_sym Publish 0.1.0 · Ray 12d ago
udt26a05l05.lbr Publish 0.1.0 · Ray 12d ago
udt26a05l05.step Publish 0.1.0 · Ray 12d ago

UDT26A05L05

TECH PUBLIC · Electrostatic And Surge Protection (TVS/ESD) · SOT-23-6

UDT26A05L05 from TECH PUBLIC, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IO1 passive Protected I/O line (note 1: I/O pins are 1, 3, 4 and 6) with reverse working voltage of 5 V max to ground and 0.8 pF max capacitance to ground.
2 GND power_in Ground reference of the TVS array, shown in the pin schematic as the common return of the I/O steering diodes and the central TVS diode.
3 IO2 passive Protected I/O line (note 1: I/O pins are 1, 3, 4 and 6) with 5 V max reverse working voltage and clamping voltage of 15 V max at IPP = 1A.
4 IO3 passive Protected I/O line (note 1: I/O pins are 1, 3, 4 and 6) with 0.4 pF max capacitance between I/O pins and 20 V max clamping at IPP = 3A.
5 VCC power_in Power line protected by the central TVS diode, per the features stating up to 4 data lines and one power line are protected; the schematic shows it as the upper rail.
6 IO4 passive Protected I/O line (note 1: I/O pins are 1, 3, 4 and 6) with 0.5 µA max reverse leakage at VRWM = 5 V and ESD protection of ±30 kV air / ±25 kV contact.

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package SOT-23-6
Category TVS/Fuse/Board Level Protection
Pins 6

CAD (KiCad official)

  • Symbol: UDT26A05L05
  • Footprint: Package_TO_SOT_SMD:SOT-23-6
  • 3D model: SOT-23-6 (KiCad packages3D, STEP)
  • 3D model files: udt26a05l05-etched.step / udt26a05l05-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); udt26a05l05.step / udt26a05l05.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (4 pp, sha256 e9bc7caf9925102f, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF