# UCLAMP0504A

**Leiditech** · ESD And Surge Protection (TVS/ESD) · SOT-25

UCLAMP0504A from Leiditech, in a SOT-25. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IO1 | passive | Protected line pin, lower-left diode of the array, tied through the diode to the common node at pin 2; 5V operating voltage (VRWM), ESD ±15kV air / ±8kV contact per IEC 61000-4-2. |
| 2 | GND | power_in | Common center node of the diode array that the diodes of pins 1, 3, 4 and 5 connect to; the datasheet pin drawing shows it without a printed name, so this is the reference/ground connection. |
| 3 | IO2 | passive | Protected line pin, lower-right diode of the array, tied through the diode to the common node at pin 2; 5V operating voltage (VRWM), ESD ±15kV air / ±8kV contact per IEC 61000-4-2. |
| 4 | IO3 | passive | Protected line pin, upper-right diode of the array, tied through the diode to the common node at pin 2; 5V operating voltage (VRWM), ESD ±15kV air / ±8kV contact per IEC 61000-4-2. |
| 5 | IO4 | passive | Protected line pin, upper-left diode of the array, tied through the diode to the common node at pin 2; 5V operating voltage (VRWM), ESD ±15kV air / ±8kV contact per IEC 61000-4-2. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Leiditech |
| Package | SOT-25 |
| Category | Circuit Protection |
| Pins | 5 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| ESD per IEC 61000-4-2 (Air) | VESD | -15 |  | 15 | Kv | IEC 61000-4-2 air discharge; printed as ±15 | 1 |
| ESD per IEC 61000-4-2 (Contact) | VESD | -8 |  | 8 | Kv | IEC 61000-4-2 contact discharge; printed as ±8 | 1 |
| Peak Pulse Power | Ppp |  |  | 100 | W | 8/20µs | 1 |
| Operating Temperature Range | TJ | -55 |  | 125 | ℃ |  | 1 |
| Storage Temperature Range | TSTJ | -55 |  | 150 | ℃ |  | 1 |
| Breakdown Voltage | VBR | 6.5 |  |  | V | IT = 1 mA | 2 |
| Reverse Working Voltage | VRWM |  | 5 |  | V |  | 2 |
| Clamping Voltage | VC |  | 9.8 |  | V | @1A | 2 |
| Clamping Voltage (Max column) | VC |  |  | 15 | V |  | 2 |
| Reverse Leakage Current (Max) | IR |  |  | 2.5 | μA |  | 2 |
| Capacitance (Typ.) | C |  | 1 |  | Pf |  | 2 |
| Capacitance (Max) | C |  |  | 20 | Pf |  | 2 |

## CAD (KiCad official)

- Symbol: `UCLAMP0504A`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-25 (KiCad packages3D, STEP)
- 3D model files: `uclamp0504a-etched.step` / `uclamp0504a-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `uclamp0504a.step` / `uclamp0504a.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Leiditech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589835393580228608) (3 pp, sha256 `bf4b39d62f1e7bc2`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/uclamp0504a-datasheet.pdf)