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UCD9080RHBR
Public Made by Adomby adom
Texas Instruments Monitors & Reset Circuits, VQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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UCD9080RHBR
Texas Instruments · Monitors & Reset Circuits · VQFN-32-EP(5x5)
UCD9080RHBR from Texas Instruments, in a VQFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VSS | power_in | Ground reference for the device; all voltages are referenced to VSS. |
| 2 | NC | unconnected | Do not connect this pin. |
| 3 | XIN | input | Must be connected to VCC. |
| 4 | NC | unconnected | Not connected internally; connect this pin to VSS. |
| 5 | RST | input | Reset input; driving the RST pin low causes a UCD9080 device reset. |
| 6 | MON1 | input | Analog input for voltage rail 1, sampled by the 10-bit SAR ADC. |
| 7 | MON2 | input | Analog input for voltage rail 2, sampled by the 10-bit SAR ADC. |
| 8 | MON3 | input | Analog input for voltage rail 3, sampled by the 10-bit SAR ADC. |
| 9 | MON6 | input | Analog input for voltage rail 6, sampled by the 10-bit SAR ADC. |
| 10 | EN4 | bidirectional | Voltage rail 4 enable digital output; polarity is configurable as active-high or active-low. |
| 11 | EN3 | bidirectional | Voltage rail 3 enable digital output; polarity is configurable as active-high or active-low. |
| 12 | EN5 | bidirectional | Voltage rail 5 enable digital output; polarity is configurable as active-high or active-low. |
| 13 | EN6 | bidirectional | Voltage rail 6 enable digital output; polarity is configurable as active-high or active-low. |
| 14 | EN7 | bidirectional | Voltage rail 7 enable digital output; polarity is configurable as active-high or active-low. |
| 15 | MON7 | input | Analog input for voltage rail 7, sampled by the 10-bit SAR ADC. |
| 16 | MON8 | input | Analog input for voltage rail 8, sampled by the 10-bit SAR ADC. |
| 17 | NC | unconnected | Not connected internally; connect this pin to VSS. |
| 18 | MON4 | input | Analog input for voltage rail 4, sampled by the 10-bit SAR ADC. |
| 19 | MON5 | input | Analog input for voltage rail 5, sampled by the 10-bit SAR ADC. |
| 20 | NC | unconnected | Not connected internally; connect this pin to VSS. |
| 21 | SDA | bidirectional | I2C data (bidirectional); an external pullup resistor to 3.3 V is required. |
| 22 | SCL | bidirectional | I2C clock; an external pullup resistor to 3.3 V is required. |
| 23 | EN1 | bidirectional | Voltage rail 1 enable digital output; polarity is configurable as active-high or active-low. |
| 24 | EN2 | bidirectional | Voltage rail 2 enable digital output; polarity is configurable as active-high or active-low. |
| 25 | EN8/ADDR1/GPO1 | bidirectional | Voltage rail 8 enable output, I2C address select 1, and general-purpose output 1; EN8 and GPO1 cannot be used at the same time. |
| 26 | ADDR2/GPO2 | bidirectional | I2C address select 2 and general-purpose digital output 2. |
| 27 | ADDR3/GPO3 | bidirectional | I2C address select 3 and general-purpose digital output 3. |
| 28 | ADDR4/GPO4 | bidirectional | I2C address select 4 and general-purpose digital output 4. |
| 29 | TEST | input | Must be connected to VSS. |
| 30 | VCC | power_in | Supply voltage input; the device operates from a single 3.3-V supply. |
| 31 | NC | unconnected | Not connected internally; connect this pin to VSS. |
| 32 | ROSC | passive | Internal oscillator frequency adjust; requires a 100-kΩ pullup to VCC for minimum drift and maximum frequency when sampling voltage rails. |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-32-EP(5x5) |
| Category | Power Supply Chip |
| Pins | 33 |
CAD (KiCad official)
- Symbol:
UCD9080RHBR - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: VQFN-32-EP(5x5) (KiCad packages3D, STEP)
- 3D model files:
ucd9080rhbr-etched.step/ucd9080rhbr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ucd9080rhbr.step/ucd9080rhbr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (39 pp, sha256
e6f3f8a900c3f7f9, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# UCD9080RHBR
**Texas Instruments** · Monitors & Reset Circuits · VQFN-32-EP(5x5)
UCD9080RHBR from Texas Instruments, in a VQFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VSS | power_in | Ground reference for the device; all voltages are referenced to VSS. |
| 2 | NC | unconnected | Do not connect this pin. |
| 3 | XIN | input | Must be connected to VCC. |
| 4 | NC | unconnected | Not connected internally; connect this pin to VSS. |
| 5 | RST | input | Reset input; driving the RST pin low causes a UCD9080 device reset. |
| 6 | MON1 | input | Analog input for voltage rail 1, sampled by the 10-bit SAR ADC. |
| 7 | MON2 | input | Analog input for voltage rail 2, sampled by the 10-bit SAR ADC. |
| 8 | MON3 | input | Analog input for voltage rail 3, sampled by the 10-bit SAR ADC. |
| 9 | MON6 | input | Analog input for voltage rail 6, sampled by the 10-bit SAR ADC. |
| 10 | EN4 | bidirectional | Voltage rail 4 enable digital output; polarity is configurable as active-high or active-low. |
| 11 | EN3 | bidirectional | Voltage rail 3 enable digital output; polarity is configurable as active-high or active-low. |
| 12 | EN5 | bidirectional | Voltage rail 5 enable digital output; polarity is configurable as active-high or active-low. |
| 13 | EN6 | bidirectional | Voltage rail 6 enable digital output; polarity is configurable as active-high or active-low. |
| 14 | EN7 | bidirectional | Voltage rail 7 enable digital output; polarity is configurable as active-high or active-low. |
| 15 | MON7 | input | Analog input for voltage rail 7, sampled by the 10-bit SAR ADC. |
| 16 | MON8 | input | Analog input for voltage rail 8, sampled by the 10-bit SAR ADC. |
| 17 | NC | unconnected | Not connected internally; connect this pin to VSS. |
| 18 | MON4 | input | Analog input for voltage rail 4, sampled by the 10-bit SAR ADC. |
| 19 | MON5 | input | Analog input for voltage rail 5, sampled by the 10-bit SAR ADC. |
| 20 | NC | unconnected | Not connected internally; connect this pin to VSS. |
| 21 | SDA | bidirectional | I2C data (bidirectional); an external pullup resistor to 3.3 V is required. |
| 22 | SCL | bidirectional | I2C clock; an external pullup resistor to 3.3 V is required. |
| 23 | EN1 | bidirectional | Voltage rail 1 enable digital output; polarity is configurable as active-high or active-low. |
| 24 | EN2 | bidirectional | Voltage rail 2 enable digital output; polarity is configurable as active-high or active-low. |
| 25 | EN8/ADDR1/GPO1 | bidirectional | Voltage rail 8 enable output, I2C address select 1, and general-purpose output 1; EN8 and GPO1 cannot be used at the same time. |
| 26 | ADDR2/GPO2 | bidirectional | I2C address select 2 and general-purpose digital output 2. |
| 27 | ADDR3/GPO3 | bidirectional | I2C address select 3 and general-purpose digital output 3. |
| 28 | ADDR4/GPO4 | bidirectional | I2C address select 4 and general-purpose digital output 4. |
| 29 | TEST | input | Must be connected to VSS. |
| 30 | VCC | power_in | Supply voltage input; the device operates from a single 3.3-V supply. |
| 31 | NC | unconnected | Not connected internally; connect this pin to VSS. |
| 32 | ROSC | passive | Internal oscillator frequency adjust; requires a 100-kΩ pullup to VCC for minimum drift and maximum frequency when sampling voltage rails. |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-32-EP(5x5) |
| Category | Power Supply Chip |
| Pins | 33 |
## CAD (KiCad official)
- Symbol: `UCD9080RHBR`
- Footprint: `Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm`
- 3D model: VQFN-32-EP(5x5) (KiCad packages3D, STEP)
- 3D model files: `ucd9080rhbr-etched.step` / `ucd9080rhbr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ucd9080rhbr.step` / `ucd9080rhbr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ucd9080) (39 pp, sha256 `e6f3f8a900c3f7f9`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ucd9080rhbr-datasheet.pdf)