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UCD90160RGCT

Texas Instruments · Monitors & Reset Circuits · QFN-64-EP(9x9)

UCD90160RGCT from Texas Instruments, in a QFN-64-EP(9x9). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 MON1 input Analog monitor input for rail voltage sensing, range 0 V to 2.5 V.
2 MON2 input Analog monitor input for rail voltage sensing, range 0 V to 2.5 V.
3 MON3 input Analog monitor input for rail voltage sensing, range 0 V to 2.5 V.
4 MON4 input Analog monitor input for rail voltage sensing, range 0 V to 2.5 V.
5 MON5 input Analog monitor input for rail voltage sensing, range 0 V to 2.5 V.
6 MON6 input Analog monitor input for rail voltage sensing, range 0 V to 2.5 V.
7 V33DIO1 power_in Digital I/O 3.3-V supply; recommended operating supply range is 3 V to 3.6 V (3.3 V nominal).
8 DVSS1 power_in Digital ground.
9 RESET input Active-low device reset input; must be held low for at least 2 µs to reset the device.
10 TRCK output JTAG test return clock output.
11 GPIO1 bidirectional General-purpose discrete I/O; GPIO outputs are configurable as open-drain or push-pull driven to 3.3 V or ground.
12 GPIO2 bidirectional General-purpose discrete I/O; GPIO outputs are configurable as open-drain or push-pull driven to 3.3 V or ground.
13 GPIO3 bidirectional General-purpose discrete I/O; GPIO outputs are configurable as open-drain or push-pull driven to 3.3 V or ground.
14 GPIO4 bidirectional General-purpose discrete I/O; GPIO outputs are configurable as open-drain or push-pull driven to 3.3 V or ground.
15 PMBUS_CLK bidirectional PMBus clock; must have a pullup to 3.3 V (pullup resistors 1 kΩ to 2 kΩ per the programming section).
16 PMBUS_DATA bidirectional PMBus data; must have a pullup to 3.3 V (pullup resistors 1 kΩ to 2 kΩ per the programming section).
17 FPWM1/GPIO5 bidirectional PWM output (15.259 kHz to 125 MHz) or GPIO.
18 FPWM2/GPIO6 bidirectional PWM output (15.259 kHz to 125 MHz) or GPIO.
19 FPWM3/GPIO7 bidirectional PWM output (15.259 kHz to 125 MHz) or GPIO.
20 FPWM4/GPIO8 bidirectional PWM output (15.259 kHz to 125 MHz) or GPIO.
21 FPWM5/GPIO9 bidirectional PWM output (15.259 kHz to 125 MHz) or GPIO.
22 FPWM6/GPIO10 bidirectional PWM output (15.259 kHz to 125 MHz) or GPIO.
23 FPWM7/GPIO11 bidirectional PWM output (15.259 kHz to 125 MHz) or GPIO.
24 FPWM8/GPIO12 bidirectional PWM output (15.259 kHz to 125 MHz) or GPIO.
25 GPIO13 bidirectional General-purpose discrete I/O.
26 DVSS2 power_in Digital ground.
27 PMBUS_ALERT output PMBus alert output, active-low and open-drain; must have a pullup to 3.3 V (named PMBALERT in the pin function table).
28 PMBUS_CNTRL input PMBus control input.
29 GPIO14 bidirectional General-purpose discrete I/O.
30 GPIO15 bidirectional General-purpose discrete I/O.
31 PWM1/GPI1 bidirectional Fixed 10-kHz PWM output or general-purpose input (GPI).
32 PWM2/GPI2 bidirectional Fixed 1-kHz PWM output or general-purpose input (GPI).
33 GPIO16 bidirectional General-purpose discrete I/O.
34 GPIO17 bidirectional General-purpose discrete I/O.
35 GPIO18 bidirectional General-purpose discrete I/O.
36 TCK/GPIO19 bidirectional JTAG test clock or general-purpose I/O; JTAG is disabled by default to free the GPIO function.
37 TDO/GPIO20 bidirectional JTAG test data out or general-purpose I/O.
38 TDI/GPIO21 bidirectional JTAG test data in or general-purpose I/O; tie to VDD with a 10-kΩ resistor.
39 TMS/GPIO22 bidirectional JTAG test mode select or general-purpose I/O; tie to VDD with a 10-kΩ resistor.
40 TRST input JTAG test reset input; tie to ground with a 10-kΩ resistor.
41 PWM4/GPI4 bidirectional PWM output (0.93 Hz to 7.8125 MHz) or general-purpose input (GPI).
42 PWM3/GPI3 bidirectional PWM output (0.93 Hz to 7.8125 MHz) or general-purpose input (GPI).
43 DVSS3 power_in Digital ground.
44 V33DIO2 power_in Digital I/O 3.3-V supply; recommended operating supply range is 3 V to 3.6 V (3.3 V nominal).
45 V33D power_in Digital core 3.3-V supply; absolute maximum is -0.3 V to 3.8 V to DVSS and recommended range is 3 V to 3.6 V.
46 V33A power_in Analog 3.3-V supply; absolute maximum is -0.3 V to 3.8 V to AVSS and recommended range is 3 V to 3.6 V.
47 BPCAP passive 1.8-V bypass capacitor pin; the layout section calls for 1-µF X7R in parallel with 0.01-µF X7R at this pin.
48 AVSS2 power_in Analog ground.
49 AVSS1 power_in Analog ground.
50 MON14 input Analog monitor input for rail voltage sensing, range 0.2 V to 2.5 V.
51 NC1 unconnected Not connected; the datasheet gives no function for this pin.
52 MON15 input Analog monitor input for rail voltage sensing, range 0.2 V to 2.5 V.
53 NC2 unconnected Not connected; the datasheet gives no function for this pin.
54 MON16 input Analog monitor input for rail voltage sensing, range 0.2 V to 2.5 V.
55 MON7 input Analog monitor input for rail voltage sensing, range 0 V to 2.5 V.
56 MON8 input Analog monitor input for rail voltage sensing, range 0 V to 2.5 V.
57 MON9 input Analog monitor input for rail voltage sensing, range 0 V to 2.5 V.
58 MON10 input Analog monitor input for rail voltage sensing, range 0 V to 2.5 V.
59 MON11 input Analog monitor input for rail voltage sensing, range 0 V to 2.5 V.
60 PMBUS_ADDR1 input PMBus analog address input, most-significant address bit.
61 PMBUS_ADDR0 input PMBus analog address input, least-significant address bit.
62 MON12 input Analog monitor input for rail voltage sensing, range 0 V to 2.5 V.
63 MON13 input Analog monitor input for rail voltage sensing, range 0 V to 2.5 V.
64 AVSS3 power_in Analog ground.
65 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFN-64-EP(9x9)
Category Power Supply Chip
Pins 65

CAD (KiCad official)

  • Symbol: UCD90160RGCT
  • Footprint: Package_DFN_QFN:QFN-64-1EP_9x9mm_P0.5mm_EP6x6mm
  • 3D model: QFN-64-EP(9x9) (KiCad packages3D, STEP)
  • 3D model files: ucd90160rgct-etched.step / ucd90160rgct-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ucd90160rgct.step / ucd90160rgct.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (55 pp, sha256 3c1805131b18b926, retrieved 2026-10-11, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF