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Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

UCD90124ARGCR

Texas Instruments · Supervisor And Reset ICs · VQFN-64-EP(9x9)

UCD90124ARGCR from Texas Instruments, in a VQFN-64-EP(9x9). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	MON1	input	Analog monitor input with a 0 V to 2.5 V range for the 12-bit ADC.
2	MON2	input	Analog monitor input with a 0 V to 2.5 V range for the 12-bit ADC.
3	MON3	input	Analog monitor input with a 0 V to 2.5 V range for the 12-bit ADC.
4	MON4	input	Analog monitor input with a 0 V to 2.5 V range for the 12-bit ADC.
5	MON5	input	Analog monitor input with a 0 V to 2.5 V range for the 12-bit ADC.
6	MON6	input	Analog monitor input with a 0 V to 2.5 V range for the 12-bit ADC.
7	V33DIO1	power_in	Digital I/O 3.3-V supply; the operating supply range is 3 V to 3.6 V (3.3 V nominal) and it needs 0.1-µF X7R bypass at this pin.
8	DVSS1	power_in	Digital ground.
9	RESET	input	Active-low device reset input that must be held low for at least 2 µs to reset the device.
10	TRCK	output	Test return clock output.
11	GPIO1	bidirectional	General-purpose discrete I/O that can be configured as open-drain or push-pull output driven to 3.3 V or ground.
12	GPIO2	bidirectional	General-purpose discrete I/O that can be configured as open-drain or push-pull output driven to 3.3 V or ground.
13	GPIO3	bidirectional	General-purpose discrete I/O that can be configured as open-drain or push-pull output driven to 3.3 V or ground.
14	GPIO4	bidirectional	General-purpose discrete I/O that can be configured as open-drain or push-pull output driven to 3.3 V or ground.
15	PMBUS_CLK	bidirectional	PMBus clock line that must have a pullup to 3.3 V.
16	PMBUS_DATA	bidirectional	PMBus data line that must have a pullup to 3.3 V.
17	FPWM1/GPIO5	bidirectional	PWM output at 15.259 kHz to 125 MHz, or general-purpose I/O.
18	FPWM2/GPIO6	bidirectional	PWM output at 15.259 kHz to 125 MHz, or general-purpose I/O.
19	FPWM3/GPIO7	bidirectional	PWM output at 15.259 kHz to 125 MHz, or general-purpose I/O.
20	FPWM4/GPIO8	bidirectional	PWM output at 15.259 kHz to 125 MHz, or general-purpose I/O.
21	FPWM5/GPIO9	bidirectional	PWM output at 15.259 kHz to 125 MHz, or general-purpose I/O.
22	FPWM6/GPIO10	bidirectional	PWM output at 15.259 kHz to 125 MHz, or general-purpose I/O.
23	FPWM7/GPIO11	bidirectional	PWM output at 15.259 kHz to 125 MHz, or general-purpose I/O.
24	FPWM8/GPIO12	bidirectional	PWM output at 15.259 kHz to 125 MHz, or general-purpose I/O.
25	GPIO13	bidirectional	General-purpose discrete I/O that can be configured as open-drain or push-pull output driven to 3.3 V or ground.
26	DVSS2	power_in	Digital ground.
27	PMBUS_ALERT	output	PMBus alert output that is active-low and open-drain and must have a pullup to 3.3 V.
28	PMBUS_CNTRL	input	PMBus control input.
29	GPIO14	bidirectional	General-purpose discrete I/O that can be configured as open-drain or push-pull output driven to 3.3 V or ground.
30	GPIO15	bidirectional	General-purpose discrete I/O that can be configured as open-drain or push-pull output driven to 3.3 V or ground.
31	PWM1/GPI1	input	Fixed 10-kHz PWM output or general-purpose input.
32	PWM2/GPI2	input	Fixed 1-kHz PWM output or general-purpose input.
33	GPIO16	bidirectional	General-purpose discrete I/O that can be configured as open-drain or push-pull output driven to 3.3 V or ground.
34	GPIO17	bidirectional	General-purpose discrete I/O that can be configured as open-drain or push-pull output driven to 3.3 V or ground.
35	GPIO18	bidirectional	General-purpose discrete I/O that can be configured as open-drain or push-pull output driven to 3.3 V or ground.
36	TCK/GPIO19	bidirectional	Test clock for JTAG, or general-purpose I/O during normal operation.
37	TDO/GPIO20	bidirectional	Test data out for JTAG, or general-purpose I/O during normal operation.
38	TDI/GPIO21	bidirectional	Test data in for JTAG, to be tied to Vdd with a 10-kΩ resistor, or general-purpose I/O.
39	TMS/GPIO22	bidirectional	Test mode select for JTAG, to be tied to Vdd with a 10-kΩ resistor, or general-purpose I/O.
40	TRST	input	JTAG test reset that must be tied to ground with a 10-kΩ resistor.
41	PWM4/GPI4	input	PWM output at 0.93 Hz to 7.8125 MHz, or general-purpose input.
42	PWM3/GPI3	input	PWM output at 0.93 Hz to 7.8125 MHz, or general-purpose input.
43	DVSS3	power_in	Digital ground.
44	V33DIO2	power_in	Digital I/O 3.3-V supply; the operating supply range is 3 V to 3.6 V (3.3 V nominal).
45	V33D	power_in	Digital core 3.3-V supply; absolute maximum is 3.8 V to DVSS and the operating range is 3 V to 3.6 V.
46	V33A	power_in	Analog 3.3-V supply; absolute maximum is 3.8 V to AVSS and the operating range is 3 V to 3.6 V.
47	BPCAP	passive	1.8-V bypass capacitor pin; tie a 0.1-µF capacitor to analog ground.
48	AVSS2	power_in	Analog ground.
49	AVSS1	power_in	Analog ground.
50	MON10	input	Analog monitor input with a 0.2 V to 2.5 V range.
51	NC1	unconnected	Not connected pin; the datasheet defines no function for it.
52	MON11	input	Analog monitor input with a 0.2 V to 2.5 V range.
53	NC2	unconnected	Not connected pin; the datasheet defines no function for it.
54	MON12	input	Analog monitor input with a 0.2 V to 2.5 V range.
55	NC3	unconnected	Not connected pin; the datasheet defines no function for it.
56	MON13	input	Analog monitor input with a 0.2 V to 2.5 V range.
57	NC4	unconnected	Not connected pin; the datasheet defines no function for it.
58	V33FB	unconnected	3.3-V linear regulator feedback connection that the datasheet says to leave unconnected.
59	MON7	input	Analog monitor input with a 0 V to 2.5 V range.
60	PMBUS_ADDR1	input	PMBus analog address input for the most-significant address bit.
61	PMBUS_ADDR0	input	PMBus analog address input for the least-significant address bit.
62	MON8	input	Analog monitor input with a 0 V to 2.5 V range.
63	MON9	input	Analog monitor input with a 0 V to 2.5 V range.
64	AVSS3	power_in	Analog ground.
65	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	VQFN-64-EP(9x9)
Category	Power Management (PMIC)
Pins	65

CAD (KiCad official)

Symbol: UCD90124ARGCR
Footprint: Package_DFN_QFN:QFN-64-1EP_9x9mm_P0.5mm_EP6x6mm
3D model: VQFN-64-EP(9x9) (KiCad packages3D, STEP)
3D model files: ucd90124argcr-etched.step / ucd90124argcr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ucd90124argcr.step / ucd90124argcr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (61 pp, sha256 186493f93a2b7a8d, retrieved 2026-10-08, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF