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UCD8220QPWPRQ1
Public Made by Adomby adom
Texas Instruments DC-DC Controllers, HTSSOP-16-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+54@@ -0,0 +1,54 @@+# UCD8220QPWPRQ1++**Texas Instruments** · DC-DC Controllers · HTSSOP-16-EP++UCD8220QPWPRQ1 from Texas Instruments, in a HTSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | NC | unconnected | No internal connection. |+| 2 | CLK | input | Clock input carrying the operating frequency and maximum duty-cycle limit; a high-impedance digital input accepting 3.3-V logic signals up to 2 MHz with an internal Schmitt trigger. |+| 3 | 3V3 | power_out | Regulated 3.3-V rail from the onboard linear regulator, capable of sourcing up to 10 mA, with a 0.22-μF ceramic capacitor to analog ground. |+| 4 | ISET | input | Programs the current that sets the slope compensation in peak current-mode control or the internal capacitor charging in voltage-mode control. |+| 5 | AGND | power_in | Analog ground return for the control circuitry, to which the VDD bypass capacitor returns. |+| 6 | CTRL | input | Error feedback voltage input from the external error amplifier, multiplied by 0.5 and routed to the negative input of the PWM comparator. |+| 7 | CLF | output | Current-limit flag that goes high when CS exceeds ILIM minus 25 mV, forcing the output driver low, and stays latched high until the next rising edge on CLK; also used for start-up handshaking. |+| 8 | ILIM | input | Current-limit threshold set pin, settable from 0.25 V to 1 V, with a default of 0.5 V when left open. |+| 9 | CS | input | Current-sense input to a fast current-limit comparator that provides cycle-by-cycle current limiting to protect the power stage. |+| 10 | PGND | power_in | Power ground return, to be connected close to the source of the power MOSFET. |+| 11 | OUT2 | output | High-current TrueDrive integrated-circuit driver output rated for ±4 A gate current. |+| 12 | OUT1 | output | High-current TrueDrive integrated-circuit driver output rated for ±4 A gate current. |+| 13 | PVDD | power_in | Supply for the output drivers, not connected internally to VDD, with its bypass capacitor returned to PGND; recommended supply range 4.5 V to 15.5 V. |+| 14 | VDD | power_in | Supply input for the control circuitry, recommended 4.5 V to 15.5 V, to be bypassed with at least 4.7 μF returned to AGND. |+| 15 | NC | unconnected | No internal connection. |+| 16 | NC | unconnected | No internal connection. |+| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | HTSSOP-16-EP |+| Category | Power Supply Chip |+| Pins | 17 |++## CAD (KiCad official)++- Symbol: `UCD8220QPWPRQ1`+- Footprint: `Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm`+- 3D model: HTSSOP-16-EP (KiCad packages3D, STEP)+- 3D model files: `ucd8220qpwprq1-etched.step` / `ucd8220qpwprq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ucd8220qpwprq1.step` / `ucd8220qpwprq1.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ucd8220-q1) (33 pp, sha256 `395d49e6716ba2ce`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ucd8220qpwprq1-datasheet.pdf)
page.jsonadded+255@@ -0,0 +1,255 @@+{+ "slug": "ucd8220qpwprq1",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments DC-DC Controllers, HTSSOP-16-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power supply chip",+ "ucd8220qpwprq1",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "ucd8220qpwprq1.kicad_sym",+ "ucd8220qpwprq1.kicad_mod",+ "ucd8220qpwprq1.glb",+ "ucd8220qpwprq1.step",+ "ucd8220qpwprq1.lbr",+ "docs/hero.png",+ "docs/ucd8220qpwprq1-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "ucd8220qpwprq1-hero.glb",+ "ucd8220qpwprq1-hero.overlay.json"+ ],+ "component": {+ "mpn": "UCD8220QPWPRQ1",+ "manufacturer": "Texas Instruments",+ "package": "HTSSOP-16-EP",+ "pin_count": 17,+ "category": "Power Supply Chip",+ "subcategory": "DC-DC Controllers",+ "datasheet": "https://www.ti.com/cn/lit/gpn/ucd8220-q1",+ "parts": {+ "symbol": "ucd8220qpwprq1.kicad_sym",+ "footprint": "ucd8220qpwprq1.kicad_mod",+ "model_3d": "ucd8220qpwprq1-hero.glb",+ "model_3d_plain": "ucd8220qpwprq1.glb",+ "model_3d_step": "ucd8220qpwprq1-etched.step",+ "model_3d_step_plain": "ucd8220qpwprq1.step",+ "lbr": "ucd8220qpwprq1.lbr"+ },+ "distributor_links": {+ "lcsc": "C2658048",+ "digikey": "296-52206-2-ND",+ "mouser": "595-UCD8220QPWPRQ1"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T20:02:23Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-52206-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-UCD8220QPWPRQ1",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "NC",+ "type": "unconnected",+ "description": "No internal connection."+ },+ {+ "number": "2",+ "name": "CLK",+ "type": "input",+ "description": "Clock input carrying the operating frequency and maximum duty-cycle limit; a high-impedance digital input accepting 3.3-V logic signals up to 2 MHz with an internal Schmitt trigger."+ },+ {+ "number": "3",+ "name": "3V3",+ "type": "power_out",+ "description": "Regulated 3.3-V rail from the onboard linear regulator, capable of sourcing up to 10 mA, with a 0.22-μF ceramic capacitor to analog ground."+ },+ {+ "number": "4",+ "name": "ISET",+ "type": "input",+ "description": "Programs the current that sets the slope compensation in peak current-mode control or the internal capacitor charging in voltage-mode control."+ },+ {+ "number": "5",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground return for the control circuitry, to which the VDD bypass capacitor returns."+ },+ {+ "number": "6",+ "name": "CTRL",+ "type": "input",+ "description": "Error feedback voltage input from the external error amplifier, multiplied by 0.5 and routed to the negative input of the PWM comparator."+ },+ {+ "number": "7",+ "name": "CLF",+ "type": "output",+ "description": "Current-limit flag that goes high when CS exceeds ILIM minus 25 mV, forcing the output driver low, and stays latched high until the next rising edge on CLK; also used for start-up handshaking."+ },+ {+ "number": "8",+ "name": "ILIM",+ "type": "input",+ "description": "Current-limit threshold set pin, settable from 0.25 V to 1 V, with a default of 0.5 V when left open."+ },+ {+ "number": "9",+ "name": "CS",+ "type": "input",+ "description": "Current-sense input to a fast current-limit comparator that provides cycle-by-cycle current limiting to protect the power stage."+ },+ {+ "number": "10",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground return, to be connected close to the source of the power MOSFET."+ },+ {+ "number": "11",+ "name": "OUT2",+ "type": "output",+ "description": "High-current TrueDrive integrated-circuit driver output rated for ±4 A gate current."+ },+ {+ "number": "12",+ "name": "OUT1",+ "type": "output",+ "description": "High-current TrueDrive integrated-circuit driver output rated for ±4 A gate current."+ },+ {+ "number": "13",+ "name": "PVDD",+ "type": "power_in",+ "description": "Supply for the output drivers, not connected internally to VDD, with its bypass capacitor returned to PGND; recommended supply range 4.5 V to 15.5 V."+ },+ {+ "number": "14",+ "name": "VDD",+ "type": "power_in",+ "description": "Supply input for the control circuitry, recommended 4.5 V to 15.5 V, to be bypassed with at least 4.7 μF returned to AGND."+ },+ {+ "number": "15",+ "name": "NC",+ "type": "unconnected",+ "description": "No internal connection."+ },+ {+ "number": "16",+ "name": "NC",+ "type": "unconnected",+ "description": "No internal connection."+ },+ {+ "number": "17",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The HTSSOP PowerPAD exposed thermal pad is not given a pin number in the pin table, so it is not lis; Pin types were mapped to KiCad ERC classes. The datasheet labels 3V3 as O and VDD as I; these were r; The 16-pin layout was taken from the page 3 top-view graphic. Pin numbers were cross-checked against",+ "exposed pad 17 added from the footprint"+ ],+ "pages_sent": 7,+ "cost_usd": 0.0593,+ "at": "2026-10-08T20:01:38"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/ucd8220-q1",+ "pages": 33,+ "sha256": "395d49e6716ba2ce",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 17,+ "described": 17,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "ucd8220qpwprq1.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 5,+ 1.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "7982746831c0bd23f4690608869ad67776faae5c762fb0376666126a3998921b",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "ucd8220qpwprq1-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 5,+ 1.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "ae781256b3ac1d2b81a79460084cac64ce6ca63e033b8ac7066101f454c97048",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}