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Contents

README

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UCD8220QPWPRQ1

Texas Instruments · DC-DC Controllers · HTSSOP-16-EP

UCD8220QPWPRQ1 from Texas Instruments, in a HTSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No internal connection.
2 CLK input Clock input carrying the operating frequency and maximum duty-cycle limit; a high-impedance digital input accepting 3.3-V logic signals up to 2 MHz with an internal Schmitt trigger.
3 3V3 power_out Regulated 3.3-V rail from the onboard linear regulator, capable of sourcing up to 10 mA, with a 0.22-μF ceramic capacitor to analog ground.
4 ISET input Programs the current that sets the slope compensation in peak current-mode control or the internal capacitor charging in voltage-mode control.
5 AGND power_in Analog ground return for the control circuitry, to which the VDD bypass capacitor returns.
6 CTRL input Error feedback voltage input from the external error amplifier, multiplied by 0.5 and routed to the negative input of the PWM comparator.
7 CLF output Current-limit flag that goes high when CS exceeds ILIM minus 25 mV, forcing the output driver low, and stays latched high until the next rising edge on CLK; also used for start-up handshaking.
8 ILIM input Current-limit threshold set pin, settable from 0.25 V to 1 V, with a default of 0.5 V when left open.
9 CS input Current-sense input to a fast current-limit comparator that provides cycle-by-cycle current limiting to protect the power stage.
10 PGND power_in Power ground return, to be connected close to the source of the power MOSFET.
11 OUT2 output High-current TrueDrive integrated-circuit driver output rated for ±4 A gate current.
12 OUT1 output High-current TrueDrive integrated-circuit driver output rated for ±4 A gate current.
13 PVDD power_in Supply for the output drivers, not connected internally to VDD, with its bypass capacitor returned to PGND; recommended supply range 4.5 V to 15.5 V.
14 VDD power_in Supply input for the control circuitry, recommended 4.5 V to 15.5 V, to be bypassed with at least 4.7 μF returned to AGND.
15 NC unconnected No internal connection.
16 NC unconnected No internal connection.
17 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package HTSSOP-16-EP
Category Power Supply Chip
Pins 17

CAD (KiCad official)

  • Symbol: UCD8220QPWPRQ1
  • Footprint: Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm
  • 3D model: HTSSOP-16-EP (KiCad packages3D, STEP)
  • 3D model files: ucd8220qpwprq1-etched.step / ucd8220qpwprq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ucd8220qpwprq1.step / ucd8220qpwprq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (33 pp, sha256 395d49e6716ba2ce, retrieved 2026-10-08, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF