# UCD4081BG-S14-R

**UTC Unisonic Tech** · Logic Gates · SOP-14

UCD4081BG-S14-R from UTC Unisonic Tech, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Gate 1 input A; input voltage -0.5 to VDD+0.5 V, max input leakage 0.1 µA at VDD=15 V. |
| 2 | 1B | input | Gate 1 input B; input voltage -0.5 to VDD+0.5 V, max input leakage 0.1 µA at VDD=15 V. |
| 3 | 1Y | output | Gate 1 AND output (Y=A·B); buffered, 0.51 mA min source/sink at VDD=5 V. |
| 4 | 2Y | output | Gate 2 AND output (Y=A·B); buffered, 0.51 mA min source/sink at VDD=5 V. |
| 5 | 2A | input | Gate 2 input A; input voltage -0.5 to VDD+0.5 V, max input leakage 0.1 µA at VDD=15 V. |
| 6 | 2B | input | Gate 2 input B; input voltage -0.5 to VDD+0.5 V, max input leakage 0.1 µA at VDD=15 V. |
| 7 | VSS | power_in | Ground (negative supply) pin. |
| 8 | 3A | input | Gate 3 input A; input voltage -0.5 to VDD+0.5 V, max input leakage 0.1 µA at VDD=15 V. |
| 9 | 3B | input | Gate 3 input B; input voltage -0.5 to VDD+0.5 V, max input leakage 0.1 µA at VDD=15 V. |
| 10 | 3Y | output | Gate 3 AND output (Y=A·B); buffered, 0.51 mA min source/sink at VDD=5 V. |
| 11 | 4Y | output | Gate 4 AND output (Y=A·B); buffered, 0.51 mA min source/sink at VDD=5 V. |
| 12 | 4A | input | Gate 4 input A; input voltage -0.5 to VDD+0.5 V, max input leakage 0.1 µA at VDD=15 V. |
| 13 | 4B | input | Gate 4 input B; input voltage -0.5 to VDD+0.5 V, max input leakage 0.1 µA at VDD=15 V. |
| 14 | VDD | power_in | Positive supply; recommended 3 to 15 V, absolute maximum 18 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | UTC Unisonic Tech |
| Package | SOP-14 |
| Category | Logic |
| Pins | 14 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage (absolute maximum) | VDD | -0.5 |  | 18 | V |  | 3 |
| Input Voltage (absolute maximum) | V(nA,nB) | -0.5 |  |  | V |  | 3 |
| Storage Temperature | TSTG | -65 |  | 150 | °C |  | 3 |
| Supply Voltage (recommended operating) | VDD | 3 |  | 15 | V |  | 3 |
| Operating Temperature | TOPR | -40 |  | 125 | °C |  | 3 |
| Input Voltage High | VIH | 3.5 |  |  | V | VDD= 5.0V, VO=0.5V | 3 |
| Input Voltage High | VIH | 7 |  |  | V | VDD= 10V, VO=1.0V | 3 |
| Input Voltage High | VIH | 11 |  |  | V | VDD= 15V, VO=1.5V | 3 |
| Input Voltage Low | VIL |  |  | 1.5 | V | VDD= 5.0V,VO=4.5V | 3 |
| Input Voltage Low | VIL |  |  | 3 | V | VDD= 10V, VO=9.0V | 3 |
| Input Voltage Low | VIL |  |  | 4 | V | VDD= 15V, VO=13.5V | 3 |
| Output Voltage High | VOH | 4.95 | 5 |  | V | VDD= 5.0V, IOH=1μA | 3 |
| Output Voltage High | VOH | 9.95 | 10 |  | V | VDD= 10V, IOH=1μA | 3 |
| Output Voltage High | VOH | 14.95 | 15 |  | V | VDD= 15V, IOH=1μA | 3 |
| Output Voltage Low | VOL |  | 0 | 0.05 | V | VDD= 5.0V, IOL=1μA | 3 |
| Output Current High | IOH | 0.51 | 0.88 |  | mA | VDD= 5.0V, VO=4.6V | 3 |
| Output Current High | IOH | 1.3 | 2.25 |  | mA | VDD= 10V, VO=9.5V | 3 |
| Output Current High | IOH | 3.4 | 8.8 |  | mA | VDD= 15V, VO=13.5V | 3 |
| Output Current Low | IOL | 0.51 | 0.88 |  | mA | VDD= 5.0V, VO=0.4V | 3 |
| Output Current Low | IOL | 1.3 | 2.25 |  | mA | VDD= 10V, VO=0.5V | 3 |
| Output Current Low | IOL | 3.4 | 8.8 |  | mA | VDD= 15V, VO=1.5V | 3 |
| Input Leakage Current | II(LEAK) |  |  | 0.1 | µA | VDD= 15V, VIN = VDD or GND | 3 |
| Quiescent Supply Current | IQ |  | 0.004 | 0.25 | µA | VDD= 5.0V, VIN = VDD or VSS, IOUT = 0 | 3 |
| Quiescent Supply Current | IQ |  | 0.005 | 0.5 | µA | VDD= 10V, VIN = VDD or VSS, IOUT = 0 | 3 |
| Quiescent Supply Current | IQ |  | 0.006 | 1 | µA | VDD= 15V, VIN = VDD or VSS, IOUT = 0 | 3 |
| Propagation Delay Low-to-High | tPLH |  | 120 | 250 | ns | VDD=5.0V, CL=50pF, RL=200kΩ | 4 |
| Propagation Delay Low-to-High | tPLH |  | 50 | 100 | ns | VDD=10V, CL=50pF, RL=200kΩ | 4 |
| Propagation Delay Low-to-High | tPLH |  | 35 | 70 | ns | VDD=15V, CL=50pF, RL=200kΩ | 4 |
| Propagation Delay High-to-Low | tPHL |  | 100 | 250 | ns | VDD=5.0V, CL=50pF, RL=200kΩ | 4 |
| Propagation Delay High-to-Low | tPHL |  | 40 | 100 | ns | VDD=10V, CL=50pF, RL=200kΩ | 4 |
| Propagation Delay High-to-Low | tPHL |  | 30 | 70 | ns | VDD=15V, CL=50pF, RL=200kΩ | 4 |
| Transition Time | tTLH / tTHL |  | 90 | 200 | ns | VDD=5.0V, CL=50pF, RL=200kΩ | 4 |
| Transition Time | tTLH / tTHL |  | 50 | 100 | ns | VDD=10V, CL=50pF, RL=200kΩ | 4 |
| Transition Time | tTLH / tTHL |  | 40 | 80 | ns | VDD=15V, CL=50pF, RL=200kΩ | 4 |
| Average Input Capacitance | CIN |  | 5 | 7.5 | pF | Any Input | 4 |

## CAD (KiCad official)

- Symbol: `UCD4081BG-S14-R`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOP-14 (KiCad packages3D, STEP)
- 3D model files: `ucd4081bg-s14-r-etched.step` / `ucd4081bg-s14-r-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ucd4081bg-s14-r.step` / `ucd4081bg-s14-r.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [UTC Unisonic Tech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590905935961808896) (5 pp, sha256 `aec1141e9c06ba20`, retrieved 2026-10-20, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ucd4081bg-s14-r-datasheet.pdf)