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UCD3138ARGCT

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Texas Instruments Monitors & Reset Circuits, VQFN-64-EP(9x9). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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UCD3138ARGCT

Texas Instruments · Monitors & Reset Circuits · VQFN-64-EP(9x9)

UCD3138ARGCT from Texas Instruments, in a VQFN-64-EP(9x9). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 AGND power_in Analog ground;
2 AD13 input 12-bit ADC channel 13, also connected to comparator E and the I-share DAC output.
3 AD12 input 12-bit ADC channel 12.
4 AD10 input 12-bit ADC channel 10.
5 AD07 input 12-bit ADC channel 7, connected to comparator F and to the reference DAC output for comparator G.
6 AD06 input 12-bit ADC channel 6, connected to comparator F and the DAC output.
7 AD04 input 12-bit ADC channel 4, connected to comparator D and the DAC output.
8 AD03 input 12-bit ADC channel 3, connected to comparators B and C to help simple OVP and UVP connections.
9 V33DIO power_in Digital I/O 3.3 V core supply; recommended range 3 V to 3.6 V.
10 DGND power_in Digital ground.
11 RESET input Device reset input, active low.
12 ADC_EXT_TRIG input ADC conversion external trigger input; alternate functions are TCAP, SYNC and PWM0, and the pin can be used as GPIO.
13 SCI_RX0 input SCI receive 0; can be used as GPIO when the peripheral is not being used.
14 SCI_TX0 output SCI transmit 0; can be used as GPIO when the peripheral is not being used.
15 PMBUS_CLK bidirectional PMBus clock, open drain; alternate function is SCI_TX0.
16 PMBUS_DATA bidirectional PMBus data, open drain; alternate function is SCI_RX0.
17 DPWM0A output DPWM 0A high-resolution output.
18 DPWM0B output DPWM 0B high-resolution output.
19 DPWM1A output DPWM 1A high-resolution output.
20 DPWM1B output DPWM 1B high-resolution output.
21 DPWM2A output DPWM 2A high-resolution output.
22 DPWM2B output DPWM 2B high-resolution output.
23 DPWM3A output DPWM 3A high-resolution output.
24 DPWM3B output DPWM 3B high-resolution output.
25 DGND power_in Digital ground.
26 SYNC bidirectional DPWM synchronize pin; alternate functions are TCAP, ADC_EXT_TRIG, PWM0 and DTC1.
27 PMBUS_ALERT bidirectional PMBus alert, open drain.
28 PMBUS_CTRL bidirectional PMBus control, open drain.
29 SCI_TX1 output SCI transmit 1; alternate function is PMBUS_ALERT.
30 SCI_RX1 input SCI receive 1; alternate function is PMBUS_CTRL.
31 PWM0 bidirectional General-purpose PWM 0.
32 PWM1 bidirectional General-purpose PWM 1.
33 DGND power_in Digital ground.
34 INT_EXT input External interrupt input.
35 FAULT0 input External fault input 0.
36 FAULT1 input External fault input 1.
37 TCK input JTAG TCK; alternate functions are TCAP, SYNC, PWM0 and DTC0.
38 TDO output JTAG TDO; alternate functions are SCI_TX0, PMBUS_ALERT, FAULT0 and DTC1.
39 TDI input JTAG TDI; alternate functions are SCI_RX0, PMBUS_CTRL, FAULT1 and DTC0.
40 TMS input JTAG TMS.
41 TCAP input Timer capture input.
42 FAULT2 input External fault input 2.
43 FAULT3 input External fault input 3.
44 DGND power_in Digital ground.
45 V33DIO power_in Digital I/O 3.3 V core supply; recommended range 3 V to 3.6 V.
46 BP18 power_in 1.8 V digital power bypass; recommended range 1.6 V to 2 V with 1.8 V nominal.
47 V33D power_in Digital 3.3 V core supply; recommended range 3 V to 3.6 V.
48 AGND power_in Substrate analog ground.
49 AGND power_in Analog ground.
50 EAP0 input Channel 0 differential analog voltage positive input for the EADC.
51 EAN0 input Channel 0 differential analog voltage negative input for the EADC.
52 EAP1 input Channel 1 differential analog voltage positive input for the EADC.
53 EAN1 input Channel 1 differential analog voltage negative input for the EADC.
54 EAP2 input Channel 2 differential analog voltage positive input; recommended for peak current mode control.
55 EAN2 input Channel 2 differential analog voltage negative input.
56 AGND power_in Analog ground.
57 V33A power_in Analog 3.3 V supply; recommended range 3 V to 3.6 V.
58 AD00 input 12-bit ADC channel 0, connected to a current source used for PMBus address detection.
59 AD01 input 12-bit ADC channel 1, connected to a current source used for PMBus address detection.
60 AD02 input 12-bit ADC channel 2, connected to comparator A and used for current sharing.
61 AD05 input 12-bit ADC channel 5.
62 AD08 input 12-bit ADC channel 8.
63 AD09 input 12-bit ADC channel 9.
64 AD11 input 12-bit ADC channel 11.
65 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-64-EP(9x9)
Category Power Supply Chip
Pins 65

CAD (KiCad official)

  • Symbol: UCD3138ARGCT
  • Footprint: Package_DFN_QFN:QFN-64-1EP_9x9mm_P0.5mm_EP6x6mm
  • 3D model: VQFN-64-EP(9x9) (KiCad packages3D, STEP)
  • 3D model files: ucd3138argct-etched.step / ucd3138argct-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ucd3138argct.step / ucd3138argct.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (85 pp, sha256 d8c76afb06ae469a, retrieved 2026-10-11, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF