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UCD3138A64PFCR

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Texas Instruments Supervisor And Reset ICs, TQFP-80(12x12). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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UCD3138A64PFCR

Texas Instruments · Supervisor And Reset ICs · TQFP-80(12x12)

UCD3138A64PFCR from Texas Instruments, in a TQFP-80(12x12). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 AD13 input 12-bit ADC channel 13, which also serves as comparator E input and I-share DAC output.
2 AD12 input 12-bit ADC channel 12.
3 AD10 input 12-bit ADC channel 10.
4 AD07 input 12-bit ADC channel 7, connected to comparator F and to the reference for comparator G, with DAC output as alternate function.
5 AD06 input 12-bit ADC channel 6, connected to comparator F, with DAC output as alternate function.
6 AD04 input 12-bit ADC channel 4, connected to comparator D, with DAC output as alternate function.
7 AD03 input 12-bit ADC channel 3, connected to comparators B and C.
8 V33DIO power_in Digital I/O 3.3 V supply; recommended operating range 3.0 V to 3.6 V (typ 3.3 V).
9 DGND power_in Digital ground.
10 RESET input Device reset input, active low.
11 PWM2 bidirectional General-purpose PWM 2 output, configurable as GPIO.
12 PWM3 bidirectional General-purpose PWM 3 output, configurable as GPIO.
13 TCAP1 bidirectional Timer capture input 1 (alternate assignment TCAP0), configurable as GPIO.
14 ADC_EXT_TRIG input External trigger input for ADC conversions, configurable as GPIO.
15 PMBUS_CLK bidirectional PMBus clock line, open drain, configurable as GPIO.
16 PMBUS_DATA bidirectional PMBus data line, open drain, configurable as GPIO.
17 PMBUS_ALERT bidirectional PMBus alert line, open drain, configurable as GPIO.
18 PMBUS_CTRL bidirectional PMBus control line, open drain, configurable as GPIO.
19 I2C_CLK bidirectional I2C clock, configurable as GPIO.
20 I2C_DATA bidirectional I2C data, configurable as GPIO.
21 DGND power_in Digital ground.
22 DPWM0A output DPWM 0A output; high-resolution DPWM outputs have 250 ps pulse-width resolution, configurable as GPIO.
23 DPWM0B output DPWM 0B output; high-resolution DPWM outputs have 250 ps pulse-width resolution, configurable as GPIO.
24 DPWM1A output DPWM 1A output; high-resolution DPWM outputs have 250 ps pulse-width resolution, configurable as GPIO.
25 DPWM1B output DPWM 1B output; high-resolution DPWM outputs have 250 ps pulse-width resolution, configurable as GPIO.
26 DPWM2A output DPWM 2A output; high-resolution DPWM outputs have 250 ps pulse-width resolution, configurable as GPIO.
27 DPWM2B output DPWM 2B output; high-resolution DPWM outputs have 250 ps pulse-width resolution, configurable as GPIO.
28 DPWM3A output DPWM 3A output; high-resolution DPWM outputs have 250 ps pulse-width resolution, configurable as GPIO.
29 DPWM3B output DPWM 3B output; high-resolution DPWM outputs have 250 ps pulse-width resolution, configurable as GPIO.
30 GPIOA bidirectional General-purpose I/O pin.
31 GPIOB bidirectional General-purpose I/O pin.
32 GPIOC bidirectional General-purpose I/O pin.
33 GPIOD bidirectional General-purpose I/O pin.
34 SYNC bidirectional DPWM synchronization pin, configurable as GPIO.
35 SCI_TX0 bidirectional SCI (UART) 0 transmit, configurable as GPIO.
36 SCI_RX0 input SCI (UART) 0 receive, configurable as GPIO.
37 SCI_TX1 bidirectional SCI (UART) 1 transmit, configurable as GPIO.
38 SCI_RX1 input SCI (UART) 1 receive, configurable as GPIO.
39 PWM0 bidirectional General-purpose PWM 0, configurable as GPIO.
40 PWM1 bidirectional General-purpose PWM 1, configurable as GPIO.
41 DGND power_in Digital ground.
42 EXT_INT input External interrupt input, configurable as GPIO.
43 FAULT0 input External fault input 0, configurable as GPIO.
44 FAULT1 input External fault input 1, configurable as GPIO.
45 TCK input JTAG TCK, for manufacturer test only (alternate RTC_IN/RTC_OUT); Fusion Digital Power debug tools are recommended instead of JTAG.
46 TDO output JTAG TDO, for manufacturer test only (alternate TCAP0/TCAP1); Fusion Digital Power debug tools are recommended instead of JTAG.
47 TDI input JTAG TDI, for manufacturer test only (alternate TCAP0/TCAP1); Fusion Digital Power debug tools are recommended instead of JTAG.
48 TMS input JTAG TMS, for manufacturer test only; Fusion Digital Power debug tools are recommended instead of JTAG.
49 TCAP0 bidirectional Timer capture input 0 (alternate assignment TCAP1), configurable as GPIO.
50 SPI_CS bidirectional SPI chip select, configurable as GPIO.
51 SPI_CLK bidirectional SPI clock, configurable as GPIO.
52 SPI_MOSI bidirectional SPI master output / slave input, configurable as GPIO.
53 SPI_MISO bidirectional SPI master input / slave output, configurable as GPIO.
54 FAULT2 input External fault input 2, configurable as GPIO.
55 FAULT3 input External fault input 3, configurable as GPIO.
56 DGND power_in Digital ground.
57 V33DIO power_in Digital I/O 3.3 V core supply; recommended operating range 3.0 V to 3.6 V (typ 3.3 V).
58 BP18 power_out 1.8 V bypass for internal use only; do not load. Requires 1 µF from BP18 to DGND per the electrical characteristics conditions.
59 V33D power_in Digital 3.3 V core supply; recommended operating range 3.0 V to 3.6 V (typ 3.3 V).
60 DGND power_in Digital ground.
61 RSVD passive Internal use only; tie to BP18.
62 RTC_IN_1_8 input RTC external clock input; absolute maximum rating is -0.3 V to 3.0 V.
63 AGND power_in Analog ground.
64 EAP0 input EADC channel 0 differential analog voltage, positive input.
65 EAN0 input EADC channel 0 differential analog voltage, negative input.
66 EAP1 input EADC channel 1 differential analog voltage, positive input.
67 EAN1 input EADC channel 1 differential analog voltage, negative input.
68 EAP2 input EADC channel 2 differential analog voltage, positive input.
69 EAN2 input EADC channel 2 differential analog voltage, negative input.
70 AGND power_in Analog ground.
71 V33A power_in Analog 3.3 V supply; recommended operating range 3.0 V to 3.6 V (typ 3.3 V).
72 AD00 input 12-bit ADC channel 0, connected to current source (used for PMBus address decoding).
73 AD01 input 12-bit ADC channel 1, connected to current source (used for PMBus address decoding).
74 AD02 input 12-bit ADC channel 2, connected to comparator A and I-share function.
75 AD05 input 12-bit ADC channel 5.
76 AD14 input 12-bit ADC channel 14.
77 AD08 input 12-bit ADC channel 8.
78 AD09 input 12-bit ADC channel 9.
79 AD11 input 12-bit ADC channel 11.
80 AGND power_in Analog ground.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TQFP-80(12x12)
Category Power Management (PMIC)
Pins 80

CAD (KiCad official)

  • Symbol: UCD3138A64PFCR
  • Footprint: Package_QFP:TQFP-80_12x12mm_P0.5mm
  • 3D model: TQFP-80(12x12) (KiCad packages3D, STEP)
  • 3D model files: ucd3138a64pfcr-etched.step / ucd3138a64pfcr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ucd3138a64pfcr.step / ucd3138a64pfcr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (84 pp, sha256 ba3102d4cc530acc, retrieved 2026-10-12, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF