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Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

UCD3138128APFCR

Texas Instruments · Supervisor And Reset ICs · TQFP-80(12x12)

UCD3138128APFCR from Texas Instruments, in a TQFP-80(12x12). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	AD13	input	12-bit ADC channel 13 input, also used for comparator E and the I-share DAC output.
2	AD12	input	12-bit ADC channel 12 input.
3	AD10	input	12-bit ADC channel 10 input.
4	AD07	input	12-bit ADC channel 7 input, connected to comparator F and the reference to comparator G, with an alternate DAC output function.
5	AD06	input	12-bit ADC channel 6 input, connected to comparator F, with an alternate DAC output function.
6	AD04	input	12-bit ADC channel 4 input, connected to comparator D, with an alternate DAC output function.
7	AD03	input	12-bit ADC channel 3 input, connected to comparators B and C.
8	V33DIO	power_in	Digital I/O 3.3 V core supply, recommended 3 V to 3.6 V.
9	DGND	power_in	Digital ground.
10	RESET	input	Active-low device reset input.
11	PWM2	bidirectional	General-purpose PWM 2 output, also configurable as GPIO.
12	PWM3	bidirectional	General-purpose PWM 3 output, also configurable as GPIO.
13	TCAP1	bidirectional	Timer capture input 1 (alternate assignment TCAP0), also configurable as GPIO.
14	ADC_EXT_TRIG	bidirectional	External trigger input for ADC conversions, also configurable as GPIO.
15	PMBUS_CLK	bidirectional	PMBus clock, open drain, also configurable as GPIO.
16	PMBUS_DATA	bidirectional	PMBus data, open drain, also configurable as GPIO.
17	PMBUS_ALERT	bidirectional	PMBus alert, open drain, also configurable as GPIO.
18	PMBUS_CTRL	bidirectional	PMBus control, open drain, also configurable as GPIO.
19	I2C_CLK	bidirectional	I2C clock, also configurable as GPIO.
20	I2C_DATA	bidirectional	I2C data, also configurable as GPIO.
21	DGND	power_in	Digital ground.
22	DPWM0A	bidirectional	DPWM 0A output, also configurable as GPIO.
23	DPWM0B	bidirectional	DPWM 0B output, also configurable as GPIO.
24	DPWM1A	bidirectional	DPWM 1A output, also configurable as GPIO.
25	DPWM1B	bidirectional	DPWM 1B output, also configurable as GPIO.
26	DPWM2A	bidirectional	DPWM 2A output, also configurable as GPIO.
27	DPWM2B	bidirectional	DPWM 2B output, also configurable as GPIO.
28	DPWM3A	bidirectional	DPWM 3A output, also configurable as GPIO.
29	DPWM3B	bidirectional	DPWM 3B output, also configurable as GPIO.
30	DTC0	bidirectional	Synchronous rectifier dead-time optimization control input 0, alternate function GPIOA.
31	DTC1	bidirectional	Synchronous rectifier dead-time optimization control input 1, alternate function GPIOB.
32	GPIOC	bidirectional	General-purpose I/O C.
33	GPIOD	bidirectional	General-purpose I/O D.
34	SYNC	bidirectional	DPWM synchronization pin, used to synchronize DPWM waveforms between multiple UCD3138x devices.
35	SCI_TX0	bidirectional	SCI (UART) 0 transmit, also configurable as GPIO.
36	SCI_RX0	bidirectional	SCI (UART) 0 receive, also configurable as GPIO.
37	SCI_TX1	bidirectional	SCI (UART) 1 transmit, also configurable as GPIO.
38	SCI_RX1	bidirectional	SCI (UART) 1 receive, also configurable as GPIO.
39	PWM0	bidirectional	General-purpose PWM 0 output, alternate function SYNC, also configurable as GPIO.
40	PWM1	bidirectional	General-purpose PWM 1 output, also configurable as GPIO.
41	DGND	power_in	Digital ground.
42	EXT_INT	bidirectional	External interrupt input, also configurable as GPIO.
43	FAULT0	bidirectional	External fault input 0, also configurable as GPIO.
44	FAULT1	bidirectional	External fault input 1, also configurable as GPIO.
45	TCK	input	JTAG test clock; the datasheet recommends pulling this pin LOW on the target. Alternate functions RTC_IN and XTAL_CLK_OUT.
46	TDO	output	JTAG test data output; the datasheet recommends pulling this pin HIGH on the target. Alternate functions TCAP0 and TCAP1.
47	TDI	input	JTAG test data input; the datasheet recommends pulling this pin HIGH on the target. Alternate functions TCAP0 and TCAP1.
48	TMS	input	JTAG test mode select; this pin must be pulled HIGH on the target so that spurious TCKs with no connection are benign.
49	TCAP0	bidirectional	Timer capture input 0 (alternate assignment TCAP1), also configurable as GPIO.
50	SPI_CS	bidirectional	SPI chip select, also configurable as GPIO.
51	SPI_CLK	bidirectional	SPI clock, also configurable as GPIO.
52	SPI_MOSI	bidirectional	SPI master output / slave input, also configurable as GPIO.
53	SPI_MISO	bidirectional	SPI master input / slave output, also configurable as GPIO.
54	FAULT2	bidirectional	External fault input 2, also configurable as GPIO.
55	FAULT3	bidirectional	External fault input 3, also configurable as GPIO.
56	DGND	power_in	Digital ground.
57	V33DIO	power_in	Digital I/O 3.3-V core supply, recommended 3 V to 3.6 V.
58	BP18	power_out	1.8-V bypass for internal use only; do not load. The electrical characteristics call for 1 µF from BP18 to DGND, and BP18 is rated -0.3 V to 2.5 V absolute maximum.
59	V33D	power_in	Digital 3.3-V core supply, recommended 3.0 V to 3.6 V.
60	DGND	power_in	Digital ground.
61	XTAL_OUT	output	Crystal oscillator output for the 10-MHz external crystal; the datasheet table labels this pin as an input, which conflicts with its name.
62	XTAL_IN	input	Crystal oscillator input for the 10-MHz external crystal; the datasheet table labels this pin as an output, which conflicts with its name.
63	AGND	power_in	Analog ground.
64	EAP0	input	Error ADC channel 0 differential positive input.
65	EAN0	input	Error ADC channel 0 differential negative input.
66	EAP1	input	Error ADC channel 1 differential positive input.
67	EAN1	input	Error ADC channel 1 differential negative input.
68	EAP2	input	Error ADC channel 2 differential positive input.
69	EAN2	input	Error ADC channel 2 differential negative input.
70	AGND	power_in	Analog ground.
71	V33A	power_in	Analog 3.3-V supply, recommended 3 V to 3.6 V.
72	AD00	input	12-bit ADC channel 0 input, connected to a 10-µA current source for PMBus address decoding.
73	AD01	input	12-bit ADC channel 1 input, connected to a 10-µA current source for PMBus address decoding.
74	AD02	input	12-bit ADC channel 2 input, connected to comparator A and the I-share function.
75	AD05	input	12-bit ADC channel 5 input.
76	AD14	input	12-bit ADC channel 14 input.
77	AD08	input	12-bit ADC channel 8 input.
78	AD09	input	12-bit ADC channel 9 input.
79	AD11	input	12-bit ADC channel 11 input.
80	AGND	power_in	Analog ground.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	TQFP-80(12x12)
Category	Power Management (PMIC)
Pins	80

CAD (KiCad official)

Symbol: UCD3138128APFCR
Footprint: Package_QFP:TQFP-80_12x12mm_P0.5mm
3D model: TQFP-80(12x12) (KiCad packages3D, STEP)
3D model files: ucd3138128apfcr-etched.step / ucd3138128apfcr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ucd3138128apfcr.step / ucd3138128apfcr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (84 pp, sha256 dd39b9085c01a102, retrieved 2026-10-08, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF