component
UCC57108CDR
Public Made by Adomby adom
Texas Instruments , SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownUCC57108CDR
Texas Instruments · IC · SOIC-8
UCC57108CDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | input | Non-inverting PWM input that is independent of supply voltage and withstands down to -5V (absolute maximum -5V to 30V). |
| 2 | VREF | power_out | 5V reference generated within the driver. |
| 3 | FLT | output | Active-low fault reporting output (datasheet name FLTb), with 20mA maximum sink current and an external pull-up limited to -0.3V to VDD+0.3V. |
| 4 | DESAT | input | Input for detecting the desaturation fault, limited to -0.3V to VDD+0.3V. |
| 5 | VDD | power_in | Driver bias supply, absolute maximum 30V with respect to GND and recommended 8.5V to 26V for the 8V UVLO option. |
| 6 | OUTH | output | Driver high (source) output. |
| 7 | OUTL | output | Driver low (sink) output. |
| 8 | GND | power_in | Driver ground, the reference for all voltages. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VDD-GND Positive power supply | VDD-GND | -0.3 | 30 | V | 4 | ||
| VDD-VEE Differential power supply | VDD-VEE | -0.3 | 30 | V | 4 | ||
| IN signal DC voltage | VIN | -5 | 30 | V | 4 | ||
| FLT current sink | IFLT | 20 | mA | 4 | |||
| Junction temperature | TJ | -40 | 150 | ℃ | 4 | ||
| Storage temperature | Tstg | -65 | 150 | ℃ | 4 | ||
| ESD HBM | V(ESD) | -2000 | 2000 | V | Human body model, ANSI/ESDA/JEDEC JS-001 | 4 | |
| ESD CDM | V(ESD) | -1000 | 1000 | V | Charged device model, JESD22-C101 | 4 | |
| VDD-GND Positive power supply (8V UVLO option) | VDD-GND | 8.5 | 26 | V | 8V UVLO Option | 4 | |
| VDD-VEE Differential power supply | VDD-VEE | 26 | V | 5 | |||
| VEE-GND Negative power supply | VEE-GND | -15 | 0 | V | 5 | ||
| IN signal DC voltage | VIN | -2 | 26 | V | 5 | ||
| Junction temperature | TJ | -40 | 150 | ℃ | 5 | ||
| Junction-to-ambient thermal resistance | RθJA | 132.7 | °C/W | D package, 8 pins | 4 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 74.9 | °C/W | D package, 8 pins | 4 | ||
| Junction-to-board thermal resistance | RθJB | 76.3 | °C/W | D package, 8 pins | 4 | ||
| Junction-to-top characterization parameter | ΨJT | 25.6 | °C/W | D package, 8 pins | 4 | ||
| Junction-to-board characterization parameter | ΨJB | 75.4 | °C/W | D package, 8 pins | 4 | ||
| VDD static supply current | IVDD | 1.1 | 1.5 | mA | VIN = 3.3 V, EN = 5V | 5 | |
| VDD static supply current | IVDD | 0.8 | 1.2 | mA | VIN = 0 V, EN = 5V | 5 | |
| VDD disable current | IDIS | 0.8 | 1.1 | mA | VIN = 3.3 V, EN = 0 V | 5 | |
| VDD UVLO rising threshold | VVDD_ON | 7.6 | 8 | 8.4 | V | 8-V UVLO Option | 5 |
| VDD UVLO falling threshold | VVDD_OFF | 6.65 | 7 | 7.35 | V | 8-V UVLO Option | 5 |
| VDD UVLO threshold hysteresis | VVDD_HYS | 1 | V | 8-V UVLO Option | 5 | ||
| Input high threshold voltage | VINH | 1.8 | 2.2 | 2.6 | V | 5 | |
| Input low threshold voltage | VINL | 0.8 | 1.2 | 1.6 | V | 5 | |
| FLT threshold voltage | VFLTth | 0.43 | 1 | V | IFLT-sink = 15mA | 5 | |
| Blanking capacitor charge current | ICHG | 200 | 250 | 316 | µA | VDESAT = 3.25V | 5 |
| DESAT detection threshold | VDESATTH | 6 | 6.5 | 7 | V | 6 | |
| DESAT propagation delay to 90% of OUT | tDES2OUT | 140 | 250 | ns | VDESAT>VDESATTH | 6 | |
| DESAT propagation delay to FLT low | tDES2FLT | 135 | 250 | ns | VDESATTH to 90% of FLT | 6 | |
| DESAT deglitch filter | tDESFIL | 100 | 150 | ns | 6 | ||
| Output rise time | tRA, tRB | 8 | 18 | ns | CL=1.8nF, 10% to 90%, Vin = 0 to 3.3V | 6 | |
| Output fall time | tFA, tFB | 14 | 32 | ns | CL=1.8nF, 90% to 10%, Vin = 0 to 3.3V | 6 | |
| Propagation delay input falling to output falling | tD2 | 28 | 50 | ns | CL=1.8nF, from 1V falling on Vin to 90% of output fall, Vin=0 - 3.3V, Fsw=500kHz, 50% duty cycle | 6 | |
| Propagation delay input rising to output rising | tD1 | 26 | 50 | ns | CL=1.8nF, from 2V rising on Vin to 10% of output rise, Vin=0 - 3.3V, Fsw=500kHz, 50% duty cycle | 6 | |
| Minimum input pulse width that passes to output | tPWmin | 9 | 15 | ns | CL=1.8nF, Vin=0 - 3.3V, Fsw=500kHz, Vo >2V | 6 | |
| Pulse width distortion | tPWD | -10 | 10 | ns | Input Pulse Width = 100ns, 500kHz, tD2, tD1, CL=1.8nF | 6 | |
| VDD quiescent supply current | IVDDQ | 1.4 | mA | VIN = 3.3V, EN = 5V, VDD = 6.5V | 5 | ||
| VEE static supply current | IVEEQ | 1.1 | mA | VIN = 0 V, EN = 5V, VEE = -10V | 5 | ||
| VDD dynamic operating current | IVDDO | 35 | mA | fSW = 1 MHz, EN = 5V, VDD=15 V, CL=1.8nF | 5 | ||
| IN pin pull down resistance | RIND | 120 | kΩ | IN=EN= 3.3V | 5 | ||
| VREF voltage reference | VREF | 5 | V | IREF=10mA | 5 | ||
| Reference output current | IREF | 20 | mA | 5 | |||
| DESAT pin discharge current | IDCHG | -20 | mA | VDESAT = 8V | 6 | ||
| Internal soft turn-off pulldown resistance | RSTO | 35 | Ω | DESAT triggered, VOUT=5V | 6 | ||
| Overtemperature threshold | TSD | 180 | C | 6 | |||
| Pull up resistance | ROH | 5 | Ω | IOUT = -500mA | 6 | ||
| Pull down resistance | ROL | 1 | Ω | IOUT = 500mA | 6 | ||
| Peak output source current | ISRCPK | -3 | A | CVDD = 10 µF, CL = 0.1 µF, f = 1 kHz | 6 | ||
| Peak output sink current | ISNKPK | 3 | A | CVDD = 10 µF, CL = 0.1 µF, f = 1 kHz | 6 |
CAD (KiCad official)
- Symbol:
UCC57108CDR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
ucc57108cdr-etched.step/ucc57108cdr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ucc57108cdr.step/ucc57108cdr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (32 pp, sha256
ee42b4e75f4cbfe5, retrieved 2026-10-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).