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UCC5390ECDR

Public Made by Adom

by adom

Texas Instruments Isolators - Gate Drivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs ucc5390ecdr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
viewers ucc5390ecdr: viewers · Ray 1mo ago
package.json ucc5390ecdr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 1mo ago
page.json ucc5390ecdr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 1mo ago
README.md Initial commit: component/ucc5390ecdr · Ray 1mo ago
ucc5390ecdr-etched.fit.json ucc5390ecdr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
ucc5390ecdr-etched.glb ucc5390ecdr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
ucc5390ecdr-etched.step ucc5390ecdr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
ucc5390ecdr.glb Publish 0.1.0 · Ray 1mo ago
ucc5390ecdr.kicad_mod Publish 0.1.0 · Ray 1mo ago
ucc5390ecdr.kicad_sym Publish 0.1.0 · Ray 1mo ago
ucc5390ecdr.lbr Publish 0.1.0 · Ray 1mo ago
ucc5390ecdr.step Publish 0.1.0 · Ray 1mo ago

UCC5390ECDR

Texas Instruments · Isolators - Gate Drivers · SOIC-8

UCC5390ECDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC1 power_in Input supply voltage operating from 3V to 15V; bypass capacitor (100nF minimum) should connect to GND1.
2 IN+ input Noninverting gate-drive voltage-control input with CMOS threshold (high: 0.55×VCC1, low: 0.3×VCC1); internally pulled low if left open.
3 IN- input Inverting gate-drive voltage-control input with CMOS threshold (high: 0.7×VCC1, low: 0.45×VCC1); internally pulled high if left open.
4 GND1 power_in Input ground; all input-side signals are referenced to this ground.
5 VCC2 power_in Positive output supply rail operating from 13.2V to 33V; bypass capacitors (10μF + 0.22μF MLCC recommended) should connect to VEE2.
6 OUT output Gate-drive output for UCC53x0E version with 17A typical peak source and 17A typical peak sink current; rail-to-rail swing between VCC2 and VEE2.
7 GND2 power_in Gate-drive common pin connected to IGBT emitter; UVLO2 is referenced to GND2 in E version for true UVLO protection.
8 VEE2 power_in Negative output supply rail for E version operating from -16V to 0V relative to GND2; bypass capacitor should connect to GND2.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Power Management (PMIC)
Pins 8

CAD (KiCad official)

  • Symbol: UCC5390ECDR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ucc5390ecdr-etched.step / ucc5390ecdr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ucc5390ecdr.step / ucc5390ecdr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (58 pp, sha256 c0b99000e2aeb8bc, retrieved 2026-09-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF