component
UCC5320SCDR
Public Made by Adomby adom
Texas Instruments Isolators - Gate Drivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
README.mdadded+45@@ -0,0 +1,45 @@+# UCC5320SCDR++**Texas Instruments** · Isolators - Gate Drivers · SOIC-8++UCC5320SCDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VCC1 | power_in | Input supply voltage (3V to 15V range) for input stage logic; bypass to GND with low ESR/ESL capacitor. |+| 2 | IN+ | input | Non-inverting gate drive control input with CMOS threshold; internally pulled low when left open circuit. |+| 3 | IN- | input | Inverting gate drive control input with CMOS threshold; internally pulled high when left open circuit. |+| 4 | GND1 | power_in | Input stage ground reference for all input-side signals. |+| 5 | VCC2 | power_in | Output stage positive supply (13.2V to 33V) for gate driver output stage; bypass to VEE2 with low ESR/ESL capacitor. |+| 6 | OUTH | output | Upper gate drive pull-up output with 4.3A typical source current on UCC5320S. |+| 7 | OUTL | output | Lower gate drive pull-down output with 4.4A typical sink current on UCC5320S. |+| 8 | VEE2 | power_in | Output stage negative supply/ground for S and M versions; bypass with low ESR/ESL capacitor. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-8 |+| Category | Power Management (PMIC) |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `UCC5320SCDR`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)+- 3D model files: `ucc5320scdr-etched.step` / `ucc5320scdr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ucc5320scdr.step` / `ucc5320scdr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ucc5320) (57 pp, sha256 `84c7492975118783`, retrieved 2026-10-07, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ucc5320scdr-datasheet.pdf)
page.jsonadded+197@@ -0,0 +1,197 @@+{+ "slug": "ucc5320scdr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Isolators - Gate Drivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "ucc5320scdr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "ucc5320scdr.kicad_sym",+ "ucc5320scdr.kicad_mod",+ "ucc5320scdr.glb",+ "ucc5320scdr.step",+ "ucc5320scdr.lbr",+ "docs/hero.png",+ "docs/ucc5320scdr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "ucc5320scdr-hero.glb",+ "ucc5320scdr-hero.overlay.json"+ ],+ "component": {+ "mpn": "UCC5320SCDR",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-8",+ "pin_count": 8,+ "category": "Power Management (PMIC)",+ "subcategory": "Isolators - Gate Drivers",+ "datasheet": "https://www.ti.com/cn/lit/gpn/ucc5320",+ "parts": {+ "symbol": "ucc5320scdr.kicad_sym",+ "footprint": "ucc5320scdr.kicad_mod",+ "model_3d": "ucc5320scdr-hero.glb",+ "model_3d_plain": "ucc5320scdr.glb",+ "model_3d_step": "ucc5320scdr-etched.step",+ "model_3d_step_plain": "ucc5320scdr.step",+ "lbr": "ucc5320scdr.lbr"+ },+ "distributor_links": {+ "lcsc": "C182079",+ "digikey": "296-49025-2-ND",+ "mouser": "595-UCC5320SCDR"+ },+ "distributor_check": {+ "checked_at": "2026-10-07T01:39:05Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-49025-2-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "595-UCC5320SCDR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VCC1",+ "type": "power_in",+ "description": "Input supply voltage (3V to 15V range) for input stage logic; bypass to GND with low ESR/ESL capacitor."+ },+ {+ "number": "2",+ "name": "IN+",+ "type": "input",+ "description": "Non-inverting gate drive control input with CMOS threshold; internally pulled low when left open circuit."+ },+ {+ "number": "3",+ "name": "IN–",+ "type": "input",+ "description": "Inverting gate drive control input with CMOS threshold; internally pulled high when left open circuit."+ },+ {+ "number": "4",+ "name": "GND1",+ "type": "power_in",+ "description": "Input stage ground reference for all input-side signals."+ },+ {+ "number": "5",+ "name": "VCC2",+ "type": "power_in",+ "description": "Output stage positive supply (13.2V to 33V) for gate driver output stage; bypass to VEE2 with low ESR/ESL capacitor."+ },+ {+ "number": "6",+ "name": "OUTH",+ "type": "output",+ "description": "Upper gate drive pull-up output with 4.3A typical source current on UCC5320S."+ },+ {+ "number": "7",+ "name": "OUTL",+ "type": "output",+ "description": "Lower gate drive pull-down output with 4.4A typical sink current on UCC5320S."+ },+ {+ "number": "8",+ "name": "VEE2",+ "type": "power_in",+ "description": "Output stage negative supply/ground for S and M versions; bypass with low ESR/ESL capacitor."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 33,+ "cost_usd": 0.2346,+ "at": "2026-10-07T01:38:48"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/ucc5320",+ "pages": 57,+ "sha256": "84c7492975118783",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "ucc5320scdr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 4.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "ucc5320scdr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6,+ 4.9,+ 1.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "5604b4d710357172f89c0356766fa23dc25da3b85e61218384ad82dbbfb2e219",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}