component
UCC5320ECDR
Public Made by Adomby adom
Texas Instruments Isolators - Gate Drivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 17h ago |
| viewers | 17h ago |
| package.json | 17h ago |
| page.json | 17h ago |
| README.md | 17h ago |
| ucc5320ecdr-etched.glb | 17h ago |
| ucc5320ecdr-etched.step | 17h ago |
| ucc5320ecdr-hero.glb | 17h ago |
| ucc5320ecdr-hero.overlay.json | 17h ago |
| ucc5320ecdr.glb | 17h ago |
| ucc5320ecdr.kicad_mod | 17h ago |
| ucc5320ecdr.kicad_sym | 17h ago |
| ucc5320ecdr.lbr | 17h ago |
| ucc5320ecdr.step | 17h ago |
| verification.json | 17h ago |
UCC5320ECDR
Texas Instruments · Isolators - Gate Drivers · SOIC-8
UCC5320ECDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC1 | power_in | Input-side supply voltage, 3 V to 15 V per the recommended operating conditions, which should be decoupled with a low-ESR or low-ESL capacitor placed close to the device. |
| 2 | IN+ | input | Noninverting gate-drive voltage-control input with a CMOS threshold, pulled low internally if left open. |
| 3 | IN- | input | Inverting gate-drive voltage-control input with a CMOS threshold, pulled high internally if left open. |
| 4 | GND1 | power_in | Input ground; all signals on the input side are referenced to this pin. |
| 5 | VCC2 | power_in | Positive output supply rail, decoupled to VEE2 with a low-ESR or low-ESL capacitor placed close to the device; VCC2-VEE2 is 13.2 V to 33 V for UCC53x0. |
| 6 | OUT | output | Gate-drive output for the UCC53x0E version. |
| 7 | GND2 | power_in | Gate-drive common pin that connects to the IGBT emitter; the UVLO of the UCC53x0E is referenced to this pin. |
| 8 | VEE2 | power_in | Negative output supply rail for the E version, with a bipolar supply of -16 V to 0 V (VEE2-GND2) and decoupling to GND2 recommended. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | , Increasing the PCB copper connecting to the VCC2 and VEE2 pins is recommended, with priority on | 40 |
CAD (KiCad official)
- Symbol:
UCC5320ECDR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
ucc5320ecdr-etched.step/ucc5320ecdr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ucc5320ecdr.step/ucc5320ecdr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (57 pp, sha256
eb278e53fd6c50ce, retrieved 2026-11-06, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).