component
UCC3813DTR-0
Public Made by Adomby adom
Texas Instruments AC-DC Controllers And Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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| ucc3813dtr-0-etched.step | 29d ago |
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UCC3813DTR-0
Texas Instruments · AC-DC Controllers And Regulators · SOIC-8
UCC3813DTR-0 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | COMP | output | COMP is the error amplifier output and the PWM comparator input, with feedback loop compensation applied between this pin and FB; the error amplifier is a low-output-impedance 2 MHz op-amp that can source and sink current, and COMP can be forced to GND to specify zero duty cycle. |
| 2 | FB | input | FB is the inverting input of the error amplifier, and its trace should be kept short with minimal stray capacitance for best stability. |
| 3 | CS | input | CS is the input of the current sense comparators (PWM and overcurrent), connected directly to the MOSFET source sense resistor, with a 100 ns leading-edge blanking interval and a 1 V typical cycle-by-cycle current limit threshold. |
| 4 | RC | input | RC is the oscillator timing pin, where an external resistor from REF and capacitor to GND set the switching frequency (up to 1 MHz) and maximum duty cycle, with recommended RT of 10 kΩ to 200 kΩ and CT of 100 pF to 1000 pF, and RT must never be less than 10 kΩ. |
| 5 | GND | power_in | GND is the reference ground and power ground for all functions of the device, and TI recommends separating the signal return path from the high-current gate driver path. |
| 6 | OUT | output | OUT is the high-current power driver output for the power MOSFET gate, rated for peak currents above ±750 mA (up to ±1 A), is held low during UVLO, and is clamped to VCC by an on-chip Zener. |
| 7 | VCC | power_in | VCC is the bias supply input, which in normal operation connects to a low-impedance source through a current-limiting resistor, must stay below the 12 V absolute maximum (about 13.5 V Zener clamp) and be bypassed to GND with a 0.1 µF ceramic capacitor placed close to the pin. |
| 8 | REF | power_out | REF is the voltage reference output (5 V for the UCCx813-0 variant, ±1.5% at 25°C) that also biases the error amplifier and internal logic, with a maximum output current of 5 mA and a bypass capacitor of at least 0.1 µF to GND required. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
UCC3813DTR-0 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
ucc3813dtr-0-etched.step/ucc3813dtr-0-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ucc3813dtr-0.step/ucc3813dtr-0.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (53 pp, sha256
a3de7ecd3190d33a, retrieved 2026-10-11, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).