component
UCC38084DR
Public Made by Adomby adom
Texas Instruments DC-DC Converters, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownUCC38084DR
Texas Instruments · DC-DC Converters · SOIC-8
UCC38084DR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CTRL | input | Error voltage input to the PWM comparator, typically driven from a secondary-side error amplifier through an opto-coupler, with an internal divider ratio of 0.45 to keep a usable range at the minimum VDD of 4.1 V. |
| 2 | ISET | input | Slope compensation current select pin, where a resistor RSET from ISET to ground sets the ramp so that IRAMP,peak = 5 x ISET,peak. |
| 3 | CS | input | Current-sense input to the PWM comparator, cycle-by-cycle peak current comparator and overcurrent comparator, where exceeding the overcurrent threshold (0.70 V to 0.80 V) causes a soft-start cycle and an internal MOSFET discharges the CS filter capacitor. |
| 4 | RT | input | Oscillator programming pin, where an external resistor from RT to GND sets the oscillator frequency with a nominal RT voltage of 1.5 V (1.2 V to 1.6 V) and a recommended timing resistor range of 25 kΩ to 698 kΩ. |
| 5 | GND | power_in | Reference ground and power ground for all functions, and a low-impedance circuit board ground plane is highly recommended because of high currents and high-frequency operation. |
| 6 | OUTB | output | Alternating high-current push-pull output stage, capable of 500 mA peak source and 1 A peak sink for driving a power MOSFET gate, switching at half the oscillator frequency. |
| 7 | OUTA | output | Alternating high-current push-pull output stage, capable of 500 mA peak source and 1 A peak sink for driving a power MOSFET gate, switching at half the oscillator frequency. |
| 8 | VDD | power_in | Power input connection with an absolute maximum of 15 V (IDD < 10 mA), where a 1-µF ceramic decoupling capacitor placed close to the chip to GND is recommended. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Start threshold voltage (UCC38084/6) | 4.1 | 4.3 | 4.5 | V | 3 | ||
| Minimum operating voltage after start (UCC38084/6) | 3.9 | 4.1 | 4.3 | V | 3 | ||
| Hysteresis voltage (UCC38084/6) | 0.1 | 0.2 | 0.3 | V | 3 | ||
| Frequency | 180 | 200 | 220 | kHz | 2 x f(OUTA) | 3 | |
| Voltage amplitude | 1.4 | 1.5 | 1.6 | V | See Note 2 | 3 | |
| RT pin voltage | 1.2 | 1.5 | 1.6 | V | 3 | ||
| Gain | 1.9 | 2.2 | 2.5 | V/V | See Note 3 | 4 | |
| Maximum input signal voltage | 0.47 | 0.52 | 0.57 | V | CTRL = 5 V, See Note 4 | 4 | |
| Sink current | 3 | 7 | 12 | mA | CS = 0.5 V, RT = 2.0 V, See Note 5 | 4 | |
| Overcurrent threshold voltage | 0.7 | 0.75 | 0.8 | V | 4 | ||
| CTRL to CS offset voltage | 0.55 | 0.7 | 0.9 | V | CS = 0 V, 25°C | 4 | |
| CTRL to CS offset voltage | 0.37 | 0.7 | 1.1 | V | CS = 0 V | 4 | |
| Maximum duty cycle | 48 | 49 | 50 | % | Measured at OUTA or OUTB, See Note 7 | 4 | |
| Minimum duty cycle | 0 | % | CTRL = 0 V | 4 | |||
| OUTA/OUTB soft-start interval time, UCC38083/4 | 1.3 | 3.5 | 8.5 | ms | CTRL = 1.8 V, CS = 0 V, Duty cycle from 0 to full, See Note 8 | 4 | |
| IRAMP, peak | IRAMP | 125 | 150 | 175 | µA | ISET, peak = 30 µA, Full duty cycle | 4 |
| Low-level output voltage (OUTA or OUTB) | 0.5 | 1 | V | IOUT = 100 mA | 4 | ||
| High-level output voltage (OUTA or OUTB) | 0.5 | 1 | V | IOUT = −50 mA, (VDD − VOUT), See Note 6 | 4 | ||
| Rise time | 25 | 60 | ns | CLOAD = 1 nF | 4 | ||
| Fall time | 25 | 60 | ns | CLOAD = 1 nF | 4 | ||
| Start-up current | 120 | 200 | µA | VDD < UVLO start threshold voltage | 3 | ||
| Supply current | 1.5 | 2.5 | mA | CTRL = 0 V, CS = 0 V, See Note 1 | 3 | ||
| Oscillator fall time (dead time) | 110 | 220 | ns | 3 | |||
| CS to output delay time | 100 | 200 | ns | CTRL = 3.5 V, 0 mV ≤ CS ≤ 600 mV | 4 | ||
| Source current | -200 | nA | 4 | ||||
| Operating free-air temperature range (UCC38084D) | TA | 0 | 70 | °C | 2 | ||
| Supply voltage VDD | VDD | 15 | V | IDD < 10 mA | 3 | ||
| Supply current IDD | IDD | 20 | mA | 3 | |||
| Sink current (peak) OUTA | 1 | A | 3 | ||||
| Sink current (peak) OUTB | 1 | A | 3 | ||||
| Source current (peak) OUTA | -0.5 | A | 3 | ||||
| Source current (peak) OUTB | -0.5 | A | 3 | ||||
| Analog input CTRL | CTRL | -0.3 | V | Upper limit VDD + 0.3 V | 3 | ||
| Analog input CS | CS | -0.3 | 6 | V | Upper limit VDD + 0.3 V, not to exceed 6 V | 3 | |
| RSET (minimum) | RSET | 5 | kΩ | Printed as >5 kΩ | 3 | ||
| RT input voltage | RT | -0.3 | 2 | V | −100 µA < IRT < 100 µA | 3 | |
| Power dissipation (D package) | 650 | mW | TA = 25°C | 3 | |||
| Junction operating temperature | TJ | -55 | 150 | °C | 3 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 3 | ||
| Lead temperature (soldering) | 300 | °C | Soldering 10 seconds | 3 | |||
| Thermal resistance junction-to-case (SOIC-8, D) | θjc | 42 | °C/W | 2 | |||
| Thermal resistance junction-to-ambient (SOIC-8, D) | θja | 84 | 160 | °C/W | Mounted to 5-inch² FR4 PCB, one ounce copper; lower value for aluminum PCB (note 1) | 2 |
CAD (KiCad official)
- Symbol:
UCC38084DR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
ucc38084dr-etched.step/ucc38084dr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ucc38084dr.step/ucc38084dr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (28 pp, sha256
19bab60962d5c6f5, retrieved 2026-10-11, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).