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UCC37322DGNR
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Texas Instruments Gate Drivers, HVSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+45@@ -0,0 +1,45 @@+# UCC37322DGNR++**Texas Instruments** · Gate Drivers · HVSSOP-8++UCC37322DGNR from Texas Instruments, in a HVSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VDD | power_in | Supply voltage and power input for the device, recommended at 4.5 V to 15 V with an absolute maximum of 16 V, and pins 1 and 8 must be connected together externally. |+| 2 | IN | input | Driver input with logic-compatible threshold and hysteresis, TTL/CMOS compatible independent of supply voltage. |+| 3 | ENBL | input | Enable input with logic-compatible threshold and hysteresis, internally pulled up to VDD through 100 kΩ for active-high operation, and the output is low when the device is disabled regardless of the input state. |+| 4 | AGND | power_in | Control-circuit ground that must be common with the control circuit, and it must be connected to PGND by a single thick trace directly under the device, with a separate 0.1-µF capacitor between VDD (pin 1) and AGND. |+| 5 | PGND | power_in | Common ground for the output stage that must be connected very closely to the source of the power MOSFET being driven to minimize ringing from output di/dt. |+| 6 | OUT | output | Driver output that must be connected externally to pin 7, capable of providing 9-A peak drive current to the gate of a power MOSFET. |+| 7 | OUT | output | Driver output that must be connected externally to pin 6, capable of providing 9-A peak drive current to the gate of a power MOSFET. |+| 8 | VDD | power_in | Supply voltage and power input for the device, recommended at 4.5 V to 15 V with an absolute maximum of 16 V, and must be connected externally to pin 1. |+| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | HVSSOP-8 |+| Category | Motor Driver ICs |+| Pins | 9 |++## CAD (KiCad official)++- Symbol: `UCC37322DGNR`+- Footprint: `Package_SO:HVSSOP-8-1EP_3x3mm_P0.65mm_EP1.57x1.89mm`+- 3D model: HVSSOP-8, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.0 mm nominal HVSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)+- 3D model files: `ucc37322dgnr-etched.step` / `ucc37322dgnr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ucc37322dgnr.step` / `ucc37322dgnr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ucc27322) (40 pp, sha256 `06a9f418bccf4e04`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ucc37322dgnr-datasheet.pdf)
page.jsonadded+206@@ -0,0 +1,206 @@+{+ "slug": "ucc37322dgnr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Gate Drivers, HVSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "motor driver ics",+ "ucc37322dgnr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "ucc37322dgnr.kicad_sym",+ "ucc37322dgnr.kicad_mod",+ "ucc37322dgnr.glb",+ "ucc37322dgnr.step",+ "ucc37322dgnr.lbr",+ "docs/hero.png",+ "docs/ucc37322dgnr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "ucc37322dgnr-hero.glb",+ "ucc37322dgnr-hero.overlay.json"+ ],+ "component": {+ "mpn": "UCC37322DGNR",+ "manufacturer": "Texas Instruments",+ "package": "HVSSOP-8",+ "pin_count": 9,+ "category": "Motor Driver ICs",+ "subcategory": "Gate Drivers",+ "datasheet": "https://www.ti.com/cn/lit/gpn/ucc27322",+ "parts": {+ "symbol": "ucc37322dgnr.kicad_sym",+ "footprint": "ucc37322dgnr.kicad_mod",+ "model_3d": "ucc37322dgnr-hero.glb",+ "model_3d_plain": "ucc37322dgnr.glb",+ "model_3d_step": "ucc37322dgnr-etched.step",+ "model_3d_step_plain": "ucc37322dgnr.step",+ "lbr": "ucc37322dgnr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2867824",+ "digikey": "296-UCC37322DGNRTR-ND",+ "mouser": "595-UCC37322DGNR"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T16:46:28Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-UCC37322DGNRTR-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "595-UCC37322DGNR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VDD",+ "type": "power_in",+ "description": "Supply voltage and power input for the device, recommended at 4.5 V to 15 V with an absolute maximum of 16 V, and pins 1 and 8 must be connected together externally."+ },+ {+ "number": "2",+ "name": "IN",+ "type": "input",+ "description": "Driver input with logic-compatible threshold and hysteresis, TTL/CMOS compatible independent of supply voltage."+ },+ {+ "number": "3",+ "name": "ENBL",+ "type": "input",+ "description": "Enable input with logic-compatible threshold and hysteresis, internally pulled up to VDD through 100 kΩ for active-high operation, and the output is low when the device is disabled regardless of the input state."+ },+ {+ "number": "4",+ "name": "AGND",+ "type": "power_in",+ "description": "Control-circuit ground that must be common with the control circuit, and it must be connected to PGND by a single thick trace directly under the device, with a separate 0.1-µF capacitor between VDD (pin 1) and AGND."+ },+ {+ "number": "5",+ "name": "PGND",+ "type": "power_in",+ "description": "Common ground for the output stage that must be connected very closely to the source of the power MOSFET being driven to minimize ringing from output di/dt."+ },+ {+ "number": "6",+ "name": "OUT",+ "type": "output",+ "description": "Driver output that must be connected externally to pin 7, capable of providing 9-A peak drive current to the gate of a power MOSFET."+ },+ {+ "number": "7",+ "name": "OUT",+ "type": "output",+ "description": "Driver output that must be connected externally to pin 6, capable of providing 9-A peak drive current to the gate of a power MOSFET."+ },+ {+ "number": "8",+ "name": "VDD",+ "type": "power_in",+ "description": "Supply voltage and power input for the device, recommended at 4.5 V to 15 V with an absolute maximum of 16 V, and must be connected externally to pin 1."+ },+ {+ "number": "9",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The DGN (HVSSOP/MSOP PowerPAD) pinout is taken from the Figure 6-1 and Table 6-1 text shared by the ; The PowerPAD exposed thermal pad on the DGN package is not assigned a pin number anywhere in the pro; The datasheet gives no pin type for AGND and PGND (shown as a dash in Table 6-1); they are classed a",+ "exposed pad 9 added from the footprint"+ ],+ "pages_sent": 11,+ "cost_usd": 0.0681,+ "at": "2026-10-08T16:46:04"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/ucc27322",+ "pages": 40,+ "sha256": "06a9f418bccf4e04",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 9,+ "described": 9,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "ucc37322dgnr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 4.91,+ 3,+ 1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "e1397242b50b0af59e910cdf2ccbb8a0428276bd778b7e771ddf9163d0a8c716",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "ucc37322dgnr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 4.91,+ 3,+ 1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "720fe606297b89b2c4429c5631542aabda0f9f429340ebff17d653c616f61144",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}