component
UCC37322DGNR
Public Made by Adomby adom
Texas Instruments Gate Drivers, HVSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownUCC37322DGNR
Texas Instruments · Gate Drivers · HVSSOP-8
UCC37322DGNR from Texas Instruments, in a HVSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Supply voltage and power input for the device, recommended at 4.5 V to 15 V with an absolute maximum of 16 V, and pins 1 and 8 must be connected together externally. |
| 2 | IN | input | Driver input with logic-compatible threshold and hysteresis, TTL/CMOS compatible independent of supply voltage. |
| 3 | ENBL | input | Enable input with logic-compatible threshold and hysteresis, internally pulled up to VDD through 100 kΩ for active-high operation, and the output is low when the device is disabled regardless of the input state. |
| 4 | AGND | power_in | Control-circuit ground that must be common with the control circuit, and it must be connected to PGND by a single thick trace directly under the device, with a separate 0.1-µF capacitor between VDD (pin 1) and AGND. |
| 5 | PGND | power_in | Common ground for the output stage that must be connected very closely to the source of the power MOSFET being driven to minimize ringing from output di/dt. |
| 6 | OUT | output | Driver output that must be connected externally to pin 7, capable of providing 9-A peak drive current to the gate of a power MOSFET. |
| 7 | OUT | output | Driver output that must be connected externally to pin 6, capable of providing 9-A peak drive current to the gate of a power MOSFET. |
| 8 | VDD | power_in | Supply voltage and power input for the device, recommended at 4.5 V to 15 V with an absolute maximum of 16 V, and must be connected externally to pin 1. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HVSSOP-8 |
| Category | Motor Driver ICs |
| Pins | 9 |
CAD (KiCad official)
- Symbol:
UCC37322DGNR - Footprint:
Package_SO:HVSSOP-8-1EP_3x3mm_P0.65mm_EP1.57x1.89mm - 3D model: HVSSOP-8, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.0 mm nominal HVSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
ucc37322dgnr-etched.step/ucc37322dgnr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ucc37322dgnr.step/ucc37322dgnr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (40 pp, sha256
06a9f418bccf4e04, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).