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Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

UCC3626DWTR

Texas Instruments · Brushless DC (BLDC) Motor Driver · SOIC-28-300mil

UCC3626DWTR from Texas Instruments, in a SOIC-28-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	GND	power_in	Reference ground for all functions of the part; bypass and timing capacitors should be terminated as close as possible to this pin.
2	VREF	power_out	5-V, 2% trimmed reference output with 5 mA of maximum available output current; bypass to ground with a ceramic capacitor of at least 0.1 µF.
3	TACH_OUT	output	Output of a monostable triggered by a change in commutation state, giving a variable duty-cycle frequency output whose on time is set by C_TACH; the monostable can be retriggered if a commutation occurs during its on time.
4	R_TACH	passive	Resistor from this pin to ground programs the current for both the oscillator and the tachometer; timing resistor values should be between 25 kΩ and 500 kΩ.
5	C_TACH	passive	Timing capacitor from this pin to ground that sets the width of the TACH_OUT pulse, charged with a current set by the R_TACH resistor.
6	CT	passive	Oscillator timing capacitor, used with R_TACH to set the oscillator frequency, normally connected to ground and alternately charged and discharged between 2.5 V and 7.5 V; timing capacitor values should be between 100 pF and 1 µF.
7	SYNCH	input	Synchronizes the PWM oscillator to an external digital clock (minimum pulse width 500 ns, with a resistor equal to R_TACH in parallel with CT when used); it must be grounded when the feature is not used.
8	DIR_OUT	output	Indicates the actual rotor direction decoded from HALLA, HALLB and HALLC, with polarity the same as DIR_IN while motoring.
9	SNS_NI	input	Noninverting input to the current sense amplifier, which is configured for a gain of five; the input common-mode and supply limits are set by the device specification.
10	SNS_I	input	Inverting input to the current sense amplifier, which is configured for a gain of five.
11	IOUT	output	Output of the current sense and absolute value amplifiers, representing the absolute motor current with gain of five, usable to close a current control loop.
12	OC_REF	input	Analog input that sets the trip voltage of the overcurrent comparator, whose common-mode input range is 0.0 V to 5.0 V.
13	PWM_I	input	Inverting input to the PWM comparator, whose input common-mode range is 2.0 V to 8.0 V.
14	PWM_NI	input	Noninverting input to the PWM comparator, whose input common-mode range is 2.0 V to 8.0 V.
15	HALLA	input	Rotor position sensor input designed for signals 120° apart, to be externally pulled up to VREF or another appropriate supply, with high-level input voltage of 1.7 V to 2.1 V and hysteresis of 0.6 V to 1.0 V.
16	HALLB	input	Rotor position sensor input designed for signals 120° apart, to be externally pulled up to VREF or another appropriate supply, with high-level input voltage of 1.7 V to 2.1 V and hysteresis of 0.6 V to 1.0 V.
17	HALLC	input	Rotor position sensor input designed for signals 120° apart, to be externally pulled up to VREF or another appropriate supply, with high-level input voltage of 1.7 V to 2.1 V and hysteresis of 0.6 V to 1.0 V.
18	COAST	input	Hysteretic comparator input that disables all outputs when the input is above 1.75 V (threshold 1.60 V to 2.00 V), useful for an overvoltage bus clamp in four-quadrant applications.
19	BRAKE	input	Digital input that forces brake mode, turning off the high-side outputs AHI, BHI and CHI and turning on the low-side outputs ALOW, BLOW and CLOW, with the tachometer remaining operational.
20	QUAD	input	Selects two-quadrant operation (QUAD = 0, only low-side devices controlled by the PWM comparator) or four-quadrant operation (QUAD = 1, both high- and low-side devices controlled).
21	DIR_IN	input	Digital input that determines the order in which the HALLA, HALLB and HALLC inputs are decoded, per Table 1.
22	CLOW	output	Digital output controlling the low-side switch of the C phase in a three-phase inverter, decoded per Table 1.
23	CHI	output	Digital output controlling the high-side switch of the C phase in a three-phase inverter, decoded per Table 1.
24	BLOW	output	Digital output controlling the low-side switch of the B phase in a three-phase inverter, decoded per Table 1.
25	BHI	output	Digital output controlling the high-side switch of the B phase in a three-phase inverter, decoded per Table 1.
26	ALOW	output	Digital output controlling the low-side switch of the A phase in a three-phase inverter, decoded per Table 1.
27	AHI	output	Digital output controlling the high-side switch of the A phase in a three-phase inverter, decoded per Table 1.
28	VDD	power_in	Input supply connection; undervoltage lockout keeps the outputs off for inputs below 10.5 V, and the pin should be bypassed with at least a 0.1 µF ceramic capacitor.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-28-300mil
Category	Motor Driver ICs
Pins	28

CAD (KiCad official)

Symbol: UCC3626DWTR
Footprint: Package_SO:SOIC-28W_7.5x17.9mm_P1.27mm
3D model: SOIC-28-300mil (KiCad packages3D, STEP)
3D model files: ucc3626dwtr-etched.step / ucc3626dwtr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ucc3626dwtr.step / ucc3626dwtr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (24 pp, sha256 a07898afc3861281, retrieved 2026-10-12, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF