component
UCC2960D
Public Made by Adomby adom
Texas Instruments AC-DC Controllers And Regulators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownUCC2960D
Texas Instruments · AC-DC Controllers And Regulators · SOIC-8
UCC2960D from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SS | input | Primary-side soft-start pin: an external capacitor to GND sets the rate at which the PWM duty cycle increases at startup, charged by a nominal 7-µA source, and the pin also serves as the AC ground return for the feedback pulse transformer. |
| 2 | FB | input | Control input for the differentiated start/stop pulses from the secondary-side PWM controller, which must have an amplitude of at least VSS ± 2.0 V for 25 ns to 200 ns per pulse and must not exceed VSS ± 7.0 V. |
| 3 | RT | input | A resistor from this pin to GND sets the free-running startup oscillator frequency, with RT specified from 22.2 kΩ to 133 kΩ for 360 kHz down to 60 kHz. |
| 4 | REF | output | The 5-V reference output supports external loads up to 10 mA and should be bypassed with at least 0.1 µF to GND. |
| 5 | CS | input | Pulse-by-pulse and shutdown overcurrent sense input: a level above the 1.0-V threshold terminates the pulse, and a signal above 1.375 V initiates a complete shutdown. |
| 6 | GND | power_in | Ground reference for all analog functions, which must be kept as clean as possible from switching noise and closely bypassed to VDD. |
| 7 | OUT | output | Drive pin for the external N-channel MOSFET power switch, sinking 1.5 A and sourcing 0.75 A, with a minimum of 4 Ω in series recommended to keep the driver within its safe operating area. |
| 8 | VDD | power_in | Power input for the control circuitry and MOSFET gate charge current, to be closely bypassed with at least 1.0 µF to GND, and internally clamped at 17.5 V so external current limiting is needed if the source can exceed this. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
UCC2960D - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
ucc2960d-etched.step/ucc2960d-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ucc2960d.step/ucc2960d.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (14 pp, sha256
b1e28c27a8a3f0c9, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).