component
UCC28C59DR
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Texas Instruments DC-DC Converters, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+44@@ -0,0 +1,44 @@+# UCC28C59DR++**Texas Instruments** · DC-DC Converters · SOIC-8++UCC28C59DR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | COMP | output | Error amplifier output for compensation with internal current limiting; user can externally force to GND to command zero duty cycle. |+| 2 | FB | input | Inverting input to error amplifier for power converter voltage-feedback loop control; noninverting input internally trimmed to 2.5 V ± 1%. |+| 3 | CS | input | Primary-side current sense input to PWM comparator noninverting input; accepts current sensing resistor connection or voltage ramp for current mode or slope compensation. |+| 4 | RT/CT | bidirectional | Fixed frequency oscillator set point; connect timing resistor to VREF and timing capacitor to GND to set switching frequency; UCC28C59 fSW = fOSC/2 limits maximum duty cycle to < 50%. |+| 5 | GND | power_in | Ground return pin for output driver stage and logic level controller section. |+| 6 | OUT | output | On-chip drive stage output for direct MOSFET driving with ±1 A peak sourcing and sinking current; UCC28C59 fSW = fOSC/2 limits maximum duty cycle to < 50%; actively held low when VDD below turn-on threshold. |+| 7 | VDD | power_in | Analog controller bias input with 30 V absolute maximum rating and 75 µA maximum startup current; requires 0.1 µF bypass capacitor and decoupling capacitance at least 10× MOSFET gate and VREF capacitance. |+| 8 | VREF | power_out | 5-V reference voltage output with ±1% accuracy providing charging current to oscillator timing capacitor; requires minimum 0.1 µF ceramic bypass capacitor to GND; no external voltage exceeding specified VREF allowed. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-8 |+| Category | Power Management (PMIC) |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `UCC28C59DR`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)+- 3D model files: `ucc28c59dr-etched.step` / `ucc28c59dr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ucc28c59dr.step` / `ucc28c59dr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/ucc28c59.pdf) (58 pp, sha256 `d9b2cab289f0aa82`, retrieved 2026-10-03, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ucc28c59dr-datasheet.pdf)
page.jsonadded+157@@ -0,0 +1,157 @@+{+ "slug": "ucc28c59dr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments DC-DC Converters, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "ucc28c59dr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "ucc28c59dr.kicad_sym",+ "ucc28c59dr.kicad_mod",+ "ucc28c59dr.glb",+ "ucc28c59dr.step",+ "ucc28c59dr.lbr",+ "docs/hero.png",+ "docs/ucc28c59dr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "ucc28c59dr-hero.glb",+ "ucc28c59dr-hero.overlay.json"+ ],+ "component": {+ "mpn": "UCC28C59DR",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-8",+ "pin_count": 8,+ "category": "Power Management (PMIC)",+ "subcategory": "DC-DC Converters",+ "datasheet": "https://www.ti.com/lit/ds/symlink/ucc28c59.pdf",+ "parts": {+ "symbol": "ucc28c59dr.kicad_sym",+ "footprint": "ucc28c59dr.kicad_mod",+ "model_3d": "ucc28c59dr-hero.glb",+ "model_3d_plain": "ucc28c59dr.glb",+ "model_3d_step": "ucc28c59dr-etched.step",+ "model_3d_step_plain": "ucc28c59dr.step",+ "lbr": "ucc28c59dr.lbr"+ },+ "distributor_links": {+ "lcsc": 6006070,+ "digikey": "296-UCC28C59DRTR-ND",+ "mouser": "595-UCC28C59DR"+ },+ "distributor_check": {+ "checked_at": "2026-10-03T03:16:26Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-UCC28C59DRTR-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "595-UCC28C59DR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "COMP",+ "type": "output",+ "description": "Error amplifier output for compensation with internal current limiting; user can externally force to GND to command zero duty cycle."+ },+ {+ "number": "2",+ "name": "FB",+ "type": "input",+ "description": "Inverting input to error amplifier for power converter voltage-feedback loop control; noninverting input internally trimmed to 2.5 V ± 1%."+ },+ {+ "number": "3",+ "name": "CS",+ "type": "input",+ "description": "Primary-side current sense input to PWM comparator noninverting input; accepts current sensing resistor connection or voltage ramp for current mode or slope compensation."+ },+ {+ "number": "4",+ "name": "RT/CT",+ "type": "bidirectional",+ "description": "Fixed frequency oscillator set point; connect timing resistor to VREF and timing capacitor to GND to set switching frequency; UCC28C59 fSW = fOSC/2 limits maximum duty cycle to < 50%."+ },+ {+ "number": "5",+ "name": "GND",+ "type": "power_in",+ "description": "Ground return pin for output driver stage and logic level controller section."+ },+ {+ "number": "6",+ "name": "OUT",+ "type": "output",+ "description": "On-chip drive stage output for direct MOSFET driving with ±1 A peak sourcing and sinking current; UCC28C59 fSW = fOSC/2 limits maximum duty cycle to < 50%; actively held low when VDD below turn-on threshold."+ },+ {+ "number": "7",+ "name": "VDD",+ "type": "power_in",+ "description": "Analog controller bias input with 30 V absolute maximum rating and 75 µA maximum startup current; requires 0.1 µF bypass capacitor and decoupling capacitance at least 10× MOSFET gate and VREF capacitance."+ },+ {+ "number": "8",+ "name": "VREF",+ "type": "power_out",+ "description": "5-V reference voltage output with ±1% accuracy providing charging current to oscillator timing capacitor; requires minimum 0.1 µF ceramic bypass capacitor to GND; no external voltage exceeding specified VREF allowed."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 13,+ "cost_usd": 0.1378,+ "at": "2026-10-03T03:15:58"+ },+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/ucc28c59.pdf",+ "pages": 58,+ "sha256": "d9b2cab289f0aa82",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}