UCC28C57LQDRQ1

Texas Instruments · AC-DC Controllers And Regulators · SOIC-8

UCC28C57LQDRQ1 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	COMP	output	Output of the error amplifier for compensation; internally current limited to allow commanding zero duty cycle by forcing COMP to GND.
2	FB	input	Inverting input to the error amplifier with noninverting input internally trimmed to 2.5 V ±1% for controlling power converter voltage-feedback loop stability.
3	CS	input	Primary-side current sense pin and noninverting input to the PWM comparator; receives signal from current sensing resistor and can have voltage ramp applied for voltage mode control.
4	RT/CT	bidirectional	Fixed frequency oscillator set point where timing resistor connects to VREF and timing capacitor connects to GND to set switching frequency.
5	GND	power_in	Ground return pin for the output driver stage and the logic level controller section.
6	OUT	output	Output of the on-chip drive stage intended to directly drive a MOSFET with peak currents up to 1 A; in UCC28C57H/L-Q1 the frequency is one-half the oscillator frequency and maximum duty cycle is limited to less than 50%.
7	VDD	power_in	Analog controller bias input providing power to the device with maximum absolute voltage rating of 30 V; total VDD current is the sum of quiescent VDD current and average OUT current, requiring bypass capacitor of typically 0.1 µF directly to GND.
8	VREF	power_in	5-V reference voltage output used to provide charging current to the oscillator timing capacitor through the timing resistor with ±1% accuracy.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-8
Category	Power Management (PMIC)
Pins	8

CAD (KiCad official)

Symbol: UCC28C57LQDRQ1
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)
3D model files: ucc28c57lqdrq1-etched.step / ucc28c57lqdrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ucc28c57lqdrq1.step / ucc28c57lqdrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (54 pp, sha256 17e157e3c78ffd7e, retrieved 2026-10-05, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

# UCC28C57LQDRQ1

**Texas Instruments** · AC-DC Controllers And Regulators · SOIC-8

UCC28C57LQDRQ1 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | COMP | output | Output of the error amplifier for compensation; internally current limited to allow commanding zero duty cycle by forcing COMP to GND. |
| 2 | FB | input | Inverting input to the error amplifier with noninverting input internally trimmed to 2.5 V ±1% for controlling power converter voltage-feedback loop stability. |
| 3 | CS | input | Primary-side current sense pin and noninverting input to the PWM comparator; receives signal from current sensing resistor and can have voltage ramp applied for voltage mode control. |
| 4 | RT/CT | bidirectional | Fixed frequency oscillator set point where timing resistor connects to VREF and timing capacitor connects to GND to set switching frequency. |
| 5 | GND | power_in | Ground return pin for the output driver stage and the logic level controller section. |
| 6 | OUT | output | Output of the on-chip drive stage intended to directly drive a MOSFET with peak currents up to 1 A; in UCC28C57H/L-Q1 the frequency is one-half the oscillator frequency and maximum duty cycle is limited to less than 50%. |
| 7 | VDD | power_in | Analog controller bias input providing power to the device with maximum absolute voltage rating of 30 V; total VDD current is the sum of quiescent VDD current and average OUT current, requiring bypass capacitor of typically 0.1 µF directly to GND. |
| 8 | VREF | power_in | 5-V reference voltage output used to provide charging current to the oscillator timing capacitor through the timing resistor with ±1% accuracy. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |

## CAD (KiCad official)

- Symbol: `UCC28C57LQDRQ1`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `ucc28c57lqdrq1-etched.step` / `ucc28c57lqdrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ucc28c57lqdrq1.step` / `ucc28c57lqdrq1.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/ucc28c57lqdrq1.pdf) (54 pp, sha256 `17e157e3c78ffd7e`, retrieved 2026-10-05, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ucc28c57lqdrq1-datasheet.pdf)