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Initial commit: component/ucc28c55dr

Ray ·725888f485 ·9d ago
2 files changed +199
README.mdadded+44
@@ -0,0 +1,44 @@+# UCC28C55DR++**Texas Instruments** · DC-DC Converters · SOIC-8++UCC28C55DR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | COMP | output | Error amplifier output for compensation and secondary error signal injection; internally current-limited to allow zero duty cycle forcing by external pull-to-GND. |+| 2 | FB | input | Inverting input to error amplifier with internally trimmed 2.5V ±1% reference for closed-loop output voltage feedback control and stability. |+| 3 | CS | input | Primary-side current sense input to PWM comparator noninverting input for cycle-by-cycle current limiting with 1V typical threshold and duty cycle termination. |+| 4 | RT/CT | bidirectional | Oscillator timing node; connect timing resistor to VREF and timing capacitor to GND to program switching frequency and set maximum duty cycle dead time. |+| 5 | GND | power_in | Ground return pin for output driver stage and logic level controller section; connect as close to signal return path as possible to minimize noise coupling. |+| 6 | OUT | output | Output driver stage with ±1A peak current capability for direct MOSFET gate drive; held actively low during UVLO and operates at one-half oscillator frequency in UCCx8C55. |+| 7 | VDD | power_in | Analog controller bias input with 30V absolute maximum rating and total current equal to sum of quiescent current and average OUT current; requires 0.1µF bypass capacitor to GND. |+| 8 | VREF | power_in | 5V precision reference voltage with ±1% initial accuracy (±2% over full temperature) for oscillator timing charging current and internal bias thresholds; requires 0.1µF ceramic bypass capacitor. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-8 |+| Category | Power Management (PMIC) |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `UCC28C55DR`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)+- 3D model files: `ucc28c55dr-etched.step` / `ucc28c55dr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ucc28c55dr.step` / `ucc28c55dr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/ucc28c55.pdf) (58 pp, sha256 `d9b2cab289f0aa82`, retrieved 2026-09-26, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ucc28c55dr-datasheet.pdf)
page.jsonadded+155
@@ -0,0 +1,155 @@+{+  "slug": "ucc28c55dr",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments DC-DC Converters, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "power management (pmic)",+    "ucc28c55dr",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "ucc28c55dr.kicad_sym",+    "ucc28c55dr.kicad_mod",+    "ucc28c55dr.glb",+    "ucc28c55dr.step",+    "ucc28c55dr.lbr",+    "docs/hero.png",+    "docs/ucc28c55dr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "UCC28C55DR",+    "manufacturer": "Texas Instruments",+    "package": "SOIC-8",+    "pin_count": 8,+    "category": "Power Management (PMIC)",+    "subcategory": "DC-DC Converters",+    "datasheet": "https://www.ti.com/lit/ds/symlink/ucc28c55.pdf",+    "parts": {+      "symbol": "ucc28c55dr.kicad_sym",+      "footprint": "ucc28c55dr.kicad_mod",+      "model_3d": "ucc28c55dr-etched.glb",+      "model_3d_plain": "ucc28c55dr.glb",+      "model_3d_step": "ucc28c55dr-etched.step",+      "model_3d_step_plain": "ucc28c55dr.step",+      "lbr": "ucc28c55dr.lbr"+    },+    "distributor_links": {+      "lcsc": "C20346038",+      "digikey": "296-UCC28C55DRTR-ND",+      "mouser": "595-UCC28C55DR"+    },+    "distributor_check": {+      "checked_at": "2026-09-26T18:16:43Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-UCC28C55DRTR-ND",+        "status": "found"+      },+      "mouser": {+        "pn": "595-UCC28C55DR",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "COMP",+        "type": "output",+        "description": "Error amplifier output for compensation and secondary error signal injection; internally current-limited to allow zero duty cycle forcing by external pull-to-GND."+      },+      {+        "number": "2",+        "name": "FB",+        "type": "input",+        "description": "Inverting input to error amplifier with internally trimmed 2.5V ±1% reference for closed-loop output voltage feedback control and stability."+      },+      {+        "number": "3",+        "name": "CS",+        "type": "input",+        "description": "Primary-side current sense input to PWM comparator noninverting input for cycle-by-cycle current limiting with 1V typical threshold and duty cycle termination."+      },+      {+        "number": "4",+        "name": "RT/CT",+        "type": "bidirectional",+        "description": "Oscillator timing node; connect timing resistor to VREF and timing capacitor to GND to program switching frequency and set maximum duty cycle dead time."+      },+      {+        "number": "5",+        "name": "GND",+        "type": "power_in",+        "description": "Ground return pin for output driver stage and logic level controller section; connect as close to signal return path as possible to minimize noise coupling."+      },+      {+        "number": "6",+        "name": "OUT",+        "type": "output",+        "description": "Output driver stage with ±1A peak current capability for direct MOSFET gate drive; held actively low during UVLO and operates at one-half oscillator frequency in UCCx8C55."+      },+      {+        "number": "7",+        "name": "VDD",+        "type": "power_in",+        "description": "Analog controller bias input with 30V absolute maximum rating and total current equal to sum of quiescent current and average OUT current; requires 0.1µF bypass capacitor to GND."+      },+      {+        "number": "8",+        "name": "VREF",+        "type": "power_in",+        "description": "5V precision reference voltage with ±1% initial accuracy (±2% over full temperature) for oscillator timing charging current and internal bias thresholds; requires 0.1µF ceramic bypass capacitor."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-4-6",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [],+        "pages_sent": 58,+        "cost_usd": 0.4955,+        "at": "2026-09-26T18:16:25"+      },+      "datasheet": {+        "url": "https://www.ti.com/lit/ds/symlink/ucc28c55.pdf",+        "pages": 58,+        "sha256": "d9b2cab289f0aa82",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 8,+        "described": 8,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file