UCC28C42DGKR

{
  "slug": "ucc28c42dgkr",
  "version": "0.1.0",
  "type": "component",
  "description": "Texas Instruments DC-DC Controllers, VSSOP-8-0.65mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power supply chip",
    "ucc28c42dgkr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ucc28c42dgkr.kicad_sym",
    "ucc28c42dgkr.kicad_mod",
    "ucc28c42dgkr.glb",
    "ucc28c42dgkr.step",
    "ucc28c42dgkr.lbr",
    "docs/hero.png",
    "docs/ucc28c42dgkr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ucc28c42dgkr-hero.glb",
    "ucc28c42dgkr-hero.overlay.json"
  ],
  "component": {
    "mpn": "UCC28C42DGKR",
    "manufacturer": "Texas Instruments",
    "package": "VSSOP-8-0.65mm",
    "pin_count": 8,
    "category": "Power Supply Chip",
    "subcategory": "DC-DC Controllers",
    "datasheet": "https://www.ti.com/lit/ds/symlink/ucc28c42.pdf",
    "parts": {
      "symbol": "ucc28c42dgkr.kicad_sym",
      "footprint": "ucc28c42dgkr.kicad_mod",
      "model_3d": "ucc28c42dgkr-hero.glb",
      "model_3d_plain": "ucc28c42dgkr.glb",
      "model_3d_step": "ucc28c42dgkr-etched.step",
      "model_3d_step_plain": "ucc28c42dgkr.step",
      "lbr": "ucc28c42dgkr.lbr"
    },
    "distributor_links": {
      "lcsc": "C1848485",
      "digikey": "296-UCC28C42DGKRTR-ND",
      "mouser": "595-UCC28C42DGKR"
    },
    "distributor_check": {
      "checked_at": "2026-10-11T13:57:00Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "296-UCC28C42DGKRTR-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "595-UCC28C42DGKR",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "COMP",
        "type": "output",
        "description": "Output of the error amplifier for loop compensation; the pin can both source and sink current, the error amplifier is internally current limited, and zero duty cycle can be commanded by externally forcing COMP to GND."
      },
      {
        "number": "2",
        "name": "FB",
        "type": "input",
        "description": "Inverting input of the error amplifier used to control the voltage-feedback loop, with the noninverting input internally trimmed to 2.5V ±1%."
      },
      {
        "number": "3",
        "name": "CS",
        "type": "input",
        "description": "Primary-side current sense input connected to the noninverting input of the PWM comparator, which terminates OUT conduction when the sensed voltage reaches the error amplifier-derived level."
      },
      {
        "number": "4",
        "name": "RT/CT",
        "type": "bidirectional",
        "description": "Oscillator set point where timing resistor RRT connects to VREF and timing capacitor CCT connects to GND to set the switching frequency; for UCCx8C42 the gate drive frequency equals fOSC."
      },
      {
        "number": "5",
        "name": "GND",
        "type": "power_in",
        "description": "Ground return pin for the output driver stage and the logic-level controller section."
      },
      {
        "number": "6",
        "name": "OUT",
        "type": "output",
        "description": "Output of the on-chip totem-pole drive stage intended to directly drive a MOSFET, sourcing and sinking peak currents up to 1A; for UCCx8C42 it switches at the oscillator frequency, can operate near 100% duty cycle, and is held low when VDD is below the turn-on threshold."
      },
      {
        "number": "7",
        "name": "VDD",
        "type": "power_in",
        "description": "Analog controller bias supply input with an absolute maximum of 20V, requiring a ceramic bypass capacitor (typically 0.1µF) connected directly to GND; total VDD current is the quiescent current plus the average OUT current."
      },
      {
        "number": "8",
        "name": "VREF",
        "type": "power_out",
        "description": "5V reference output with ±1% tolerance that requires a ceramic bypass of at least 0.1µF to GND placed as close to the pin as possible, and a short-circuit current of 55mA maximum."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The datasheet labels VDD as input (I) and VREF as output (O); I mapped VDD to power_in and VREF to p; The datasheet pin table gives GND no type (shown as a dash); typed as power_in per the GND rule.; The datasheet types RT/CT as I/O; mapped to bidirectional."
        ],
        "pages_sent": 15,
        "cost_usd": 0.0913,
        "at": "2026-10-11T13:56:46"
      },
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/ucc28c42.pdf",
        "pages": 60,
        "sha256": "9fa55f996731c56b",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ucc28c42dgkr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          3.1,
          2.0,
          0.85
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "353552981eef35cb93635057d4aeb89aef22648c77af6fd095e328bfe6b834bd",
        "checked": "2026-10-11",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ucc28c42dgkr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          3.1,
          2.0,
          0.85
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "3b524ecffcafb560b9deb15e979bfa4d642f1f698418c6205d2558b64c5418f1",
        "checked": "2026-10-11",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}