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ucc28c41qdrq1

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Texas Instruments AC-DC Controllers and Regulators, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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README

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UCC28C41QDRQ1

Texas Instruments · AC-DC Controllers and Regulators · SOIC-8

UCC28C41QDRQ1 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 COMP output Error amplifier output for loop compensation. Also used as a control port via an opto-isolator from a secondary-side error amplifier. The error amplifier is internally current limited so zero duty cycle can be commanded by externally forcing COMP to GND. Max output sink current 10 mA.
2 FB input Inverting input to the internal error amplifier used to close the power converter voltage-feedback loop. The non-inverting input is internally trimmed to a 2.5 V ±1% reference. Analog input range -0.3 V to 6.3 V.
3 CS input Primary-side current sense input; non-inverting input to the PWM comparator. Connect to the current-sense resistor. Compared to a signal proportional to the error amplifier output to terminate OUT conduction (fast 35 ns cycle-by-cycle limit). Can also accept a voltage ramp for voltage-mode operation. Max 6.3 V.
4 RT/CT bidirectional Fixed-frequency oscillator set point. Connect timing resistor RRT from this pin to VREF and timing capacitor CCT from this pin to GND to set the oscillator frequency. On the UCC28C41-Q1 the OUT switching frequency is one-half of fOSC due to the internal T flip-flop (50% max duty). Keep CCT trace to GND short. Max 6.3 V.
5 GND power_in Ground return pin for the output driver stage and the logic-level controller section. All voltages in the datasheet are referenced to this pin.
6 OUT output On-chip gate-driver output intended to directly drive an external MOSFET. Rail-to-rail swing with 25 ns rise / 20 ns fall and ±1 A peak source/sink. On the UCC28C41-Q1 the OUT frequency is fOSC/2 (max duty cycle <50%). Actively held low when VDD is below the turn-on threshold. Recommended operating VOUT up to 18 V (abs max 20 V).
7 VDD power_in Analog controller bias supply input. UVLO turn-on at 14.5 V, turn-off at 9 V. Total VDD current is the sum of quiescent current (as low as 2.3 mA at 52 kHz, 50 µA standby) and average gate-driver current. Requires a 0.1 µF bypass capacitor directly to GND, plus additional bulk capacitance ≥10× the driven MOSFET's gate capacitance. Recommended max 18 V, absolute max 20 V, max input current 30 mA.
8 VREF power_out 5 V internal reference output. Supplies charging current to the oscillator timing capacitor through RRT. Must be bypassed to GND with a ceramic capacitor (≥0.1 µF) as close to the pin as possible; add more bypass for external loads. Max continuous voltage from external circuitry 5.5 V, absolute max 7 V, max source current 20 mA.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category PMIC
Pins 8

Ordering variants

  • UCC28C41QDRQ1

CAD (KiCad official)

  • Symbol: UCC28C41QDRQ1
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ucc28c41qdrq1-etched.step / ucc28c41qdrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ucc28c41qdrq1.step / ucc28c41qdrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (None pp, sha256 12f225ad88e81aa9, retrieved 2026-08-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

Symbol & Footprint

Schematic Symbol

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PCB Footprint

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Datasheet

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