component
UCC2895QDWRQ1
Public Made by Adomby adom
Texas Instruments DC-DC Converters, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"component": {
"mpn": "UCC2895QDWRQ1",
"manufacturer": "Texas Instruments",
"package": "SOIC-20-300mil",
"pin_count": 20,
"category": "Power Management (PMIC)",
"subcategory": "DC-DC Converters",
"datasheet": "https://www.ti.com/cn/lit/gpn/ucc2895-q1",
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"distributor_links": {
"lcsc": "C2864308",
"digikey": "296-23908-2-ND",
"mouser": "595-UCC2895QDWRQ1"
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"status": "found",
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"pins": [
{
"number": "1",
"name": "EAN",
"type": "input",
"description": "Inverting input to the error amplifier, which must be kept below 3.6 V for proper operation."
},
{
"number": "2",
"name": "EAOUT",
"type": "bidirectional",
"description": "Error amplifier output, internally clamped to the soft-start voltage and feeding the PWM and no-load comparators, which shut the outputs down below 500 mV and re-enable them above 600 mV."
},
{
"number": "3",
"name": "RAMP",
"type": "input",
"description": "Inverting input of the PWM comparator, receiving the CT waveform in voltage or average-current mode or the current signal plus slope compensation in peak-current mode."
},
{
"number": "4",
"name": "REF",
"type": "output",
"description": "5-V ±1.2% reference that can supply up to 5 mA to external loads, with no more than 1 µF of total capacitance on this pin."
},
{
"number": "5",
"name": "GND",
"type": "power_in",
"description": "Ground for all circuits except the output stages, and must be electrically tied to PGND."
},
{
"number": "6",
"name": "SYNC",
"type": "bidirectional",
"description": "Oscillator synchronization pin that outputs the internal clock or accepts an external clock, with a level-sensitive input threshold of 1.9 V low and 2.1 V high."
},
{
"number": "7",
"name": "CT",
"type": "input",
"description": "Oscillator timing capacitor charged by a programmed current to a 2.35 V sawtooth peak, with CT ranging from 100 pF to 880 pF."
},
{
"number": "8",
"name": "RT",
"type": "input",
"description": "Oscillator timing resistor that sets the switching frequency, with RT ranging from 40 kΩ to 120 kΩ."
},
{
"number": "9",
"name": "DELAB",
"type": "input",
"description": "Programs the dead time between OUTA and OUTB, can source approximately 1 mA maximum, is clamped to a minimum of 0.5 V, and tying it to REF defeats the programmed delay."
},
{
"number": "10",
"name": "DELCD",
"type": "input",
"description": "Programs the dead time between OUTC and OUTD, can source approximately 1 mA maximum, is clamped to a minimum of 0.5 V, and tying it to REF defeats the programmed delay."
},
{
"number": "11",
"name": "ADS",
"type": "input",
"description": "Adaptive delay set input, which must be limited to between 0 V and 2.5 V and must be less than or equal to CS."
},
{
"number": "12",
"name": "CS",
"type": "input",
"description": "Current-sense input for cycle-by-cycle current limiting, with an overcurrent threshold of 2.5 V that initiates a soft stop."
},
{
"number": "13",
"name": "OUTD",
"type": "output",
"description": "100-mA CMOS driver output for the second half-bridge, phase shifted with respect to OUTB."
},
{
"number": "14",
"name": "OUTC",
"type": "output",
"description": "100-mA CMOS driver output for the second half-bridge, phase shifted with respect to OUTA."
},
{
"number": "15",
"name": "VDD",
"type": "power_in",
"description": "Power-supply input that must be bypassed with a minimum of 1 µF low-ESR, low-ESL capacitor to ground."
},
{
"number": "16",
"name": "PGND",
"type": "power_in",
"description": "Output-stage power ground that carries high current, so its board traces must be low impedance and electrically tied to GND."
},
{
"number": "17",
"name": "OUTB",
"type": "output",
"description": "100-mA CMOS driver output for the first half-bridge, fully complementary to OUTA assuming no programmed delay."
},
{
"number": "18",
"name": "OUTA",
"type": "output",
"description": "100-mA CMOS driver output for the first half-bridge, operating near 50% duty cycle at one-half the oscillator frequency."
},
{
"number": "19",
"name": "SS/DISB",
"type": "input",
"description": "Combined soft-start and disable pin, where forcing it below 0.5 V disables the chip and it sources current equal to IRT during soft start."
},
{
"number": "20",
"name": "EAP",
"type": "input",
"description": "Noninverting input to the error amplifier, which must be kept below 3.6 V for proper operation."
}
],
"provenance": {
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"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Pin numbers were taken from the DW top-view pinout (page 2) and cross-checked against the Terminal F; The datasheet gives no explicit '300 mil' wording; the package is identified from the ordering table"
],
"pages_sent": 25,
"cost_usd": 0.1009,
"at": "2026-10-11T11:03:43"
},
"datasheet": {
"url": "https://www.ti.com/cn/lit/gpn/ucc2895-q1",
"pages": 25,
"sha256": "5b333e1d4ff20c03",
"source_tier": "lcsc"
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"cad": "KiCad official (CC-BY-SA 4.0)",
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