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Contents

README

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UCC2895PWTR

Texas Instruments · AC-DC Controllers And Regulators · TSSOP-20

UCC2895PWTR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 EAN input Inverting input to the error amplifier; keep below 3.6 V for proper operation.
2 EAOUT output Error amplifier output internally clamped to soft-start voltage; drives PWM and no-load comparators.
3 RAMP input Inverting input of the PWM comparator; receives oscillator ramp in voltage mode or current sense signal in current mode.
4 REF power_out 5-V ±1.2% voltage reference output supplying up to 5 mA to external loads; bypass with 0.1 μF to ground.
5 GND power_in Analog ground for all internal circuits except output stages.
6 SYNC bidirectional Bidirectional oscillator synchronization pin; serves as clock output or external clock input for synchronizing multiple devices.
7 CT input Oscillator timing capacitor connection; typically 100-880 pF to program switching frequency via fixed charging current.
8 RT input Oscillator timing resistor connection; ranges 40-120 kΩ to program switching frequency and soft-start charging current.
9 DELAB input Delay-programming pin setting dead time between complementary outputs OUTA and OUTB via external resistor (2.5-40 kΩ).
10 DELCD input Delay-programming pin setting dead time between complementary outputs OUTC and OUTD via external resistor (2.5-40 kΩ).
11 ADS input Adaptive delay set pin limiting voltage to 0-2.5 V; sets ratio between maximum and minimum output delay times.
12 CS input Current sense input for cycle-by-cycle current limiting in peak current mode and overcurrent protection (peak threshold 2.0 V, overcurrent 2.5 V).
13 OUTD output 100-mA complementary MOS driver output optimized for FET driver circuits; 20-35 ns rise/fall time into 100 pF load.
14 OUTC output 100-mA complementary MOS driver output phase-shifted relative to OUTA; 20-35 ns rise/fall time into 100 pF load.
15 VDD power_in Power supply input (10-16.5 V recommended); must be bypassed with minimum 1 μF low-ESR capacitor to PGND.
16 PGND power_in Output stage ground reference carrying high switching currents; must be connected to GND with low-impedance trace.
17 OUTB output 100-mA complementary MOS driver output fully complementary to OUTA at 50% duty cycle; 20-35 ns rise/fall time into 100 pF load.
18 OUTA output 100-mA complementary MOS driver output for first half-bridge; 20-35 ns rise/fall time into 100 pF load.
19 SS/DISB input Soft-start and disable pin combining independent functions; sources 35 μA charging current and sinks 350 μA during soft-start.
20 EAP input Non-inverting input to the error amplifier; keep below 3.6 V for proper operation.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20
Category Power Management (PMIC)
Pins 20

CAD (KiCad official)

  • Symbol: UCC2895PWTR
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: ucc2895pwtr-etched.step / ucc2895pwtr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ucc2895pwtr.step / ucc2895pwtr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (61 pp, sha256 839591a78c6304d9, retrieved 2026-09-27, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF