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UCC28950PW

Public Made by Adom

by adom

Texas Instruments DC-DC Converters, TSSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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UCC28950PW

Texas Instruments · DC-DC Converters · TSSOP-24

UCC28950PW from Texas Instruments, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VREF power_in Provides a 5 V, ±1.5%, 20 mA reference voltage output.
2 EA+ input Error amplifier noninverting input.
3 EA- input Error amplifier inverting input.
4 COMP bidirectional Error amplifier output and input to the PWM comparator.
5 SS/EN input Sets soft-start programming, device enable and hiccup mode protection circuit.
6 DELAB input Sets the dead-time delay between OUTA and OUTB.
7 DELCD input Sets the dead-time delay between OUTC and OUTD.
8 DELEF input Sets the delay time between OUTA and OUTF, and between OUTB and OUTE.
9 TMIN input Sets the minimum duty cycle in burst mode.
10 RT input Sets the oscillator frequency and the leader or follower mode.
11 RSUM input Sets the slope compensation and selects voltage mode or peak current mode.
12 DCM input Sets the DCM threshold.
13 ADELEF input Programs the delay time between primary side and secondary side switches, tAFSET and tBESET.
14 ADEL input Programs the primary switch dead time over the CS voltage range, tABSET and tCDSET.
15 CS input Current sense input for cycle-by-cycle overcurrent protection and adaptive delay functions.
16 SYNC bidirectional Synchronization output from the leader controller to the input of the follower controller.
17 OUTF output Primary switching output with 0.2 A sink and source capability.
18 OUTE output Primary switching output with 0.2 A sink and source capability.
19 OUTD output Primary switching output with 0.2 A sink and source capability.
20 OUTC output Primary switching output with 0.2 A sink and source capability.
21 OUTB output Primary switching output with 0.2 A sink and source capability.
22 OUTA output Primary switching output with 0.2 A sink and source capability.
23 VDD power_in Bias supply input for the controller.
24 GND power_in Ground; all signals are referenced to this node.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-24
Category Power Management (PMIC)
Pins 24

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input supply voltage, VDD VDD -0.4 20 V 4
Output voltage on OUTA, OUTB, OUTC, OUTD, OUTE, OUTF (max printed as VDD + 0.4 V) -0.4 V 4
Input voltage on DELAB, DELCD, DELEF, SS/EN, DCM, TMIN, RT, SYNC, RSUM, EA+, EA-, COMP, CS, ADEL, ADELEF (max printed as VREF + 0.4 V) -0.4 V 4
Output voltage on VREF VREF -0.4 5.6 V 4
Operating virtual junction temperature TJ -40 150 °C 4
Operating ambient temperature TA -40 125 °C 4
Lead temperature (soldering, 10 s) 300 °C soldering, 10 s 4
Storage temperature Tstg -65 150 °C 4
Electrostatic discharge, human body model (HBM) V(ESD) -2000 2000 V per ANSI/ESDA/JEDEC JS-001 4
Electrostatic discharge, charged device model (CDM) V(ESD) -500 500 V per JEDEC JESD22-C101 4
Supply voltage, VDD VDD 8 12 17 V 4
Operating junction temperature TJ -40 125 °C 4
Converter switching frequency setting FSW(nom) 50 1000 kHz 4
Programmable delay between OUTA, OUTB and OUTC, OUTD set by resistors DELAB and DELCD and parameter KA 30 1000 ns 4
Maximum duty cycle, UCC28950 (DMAX) DMAX 90 % 4
Programmable delay between OUTA, OUTF and OUTB, OUTE set by resistor DELEF and parameter KEF 30 1400 ns 4
Programmable DCM as percentage of voltage at CS 5 30 % 4
Programmable TMIN 100 800 ns 4
UVLO start threshold UVLO_RTH 6.75 7.9 V 6
UVLO minimum operating voltage after start UVLO_FTH 6.15 7.2 V 6
UVLO hysteresis UVLO_HYST 0.53 0.75 V 6
Startup current IDD(off) 270 µA VDD = 5.2V 6
Operating supply current IDD 10 mA 6
VREF total output range VREF 4.925 5.075 V 0 ≤ IR ≤ 20mA, 8V ≤ VDD ≤ 17V 6
Short circuit current ISCC -53 -23 mA VREF = 0V 6
Switching frequency FSW(nom), total range FSW(nom) 92 108 kHz 6
Maximum duty cycle DMAX 97 % 6
Synchronization phase, total range PHSYNC 85 95 °PH RT = 59kΩ between RT and GND, Input pulses 200kHz, D = 0.5 at SYNC 6
Synchronization frequency, total range FSYNC 180 220 kHz RT = 59kΩ between RT and 5V; –40 °C ≤ TJ ≤ 125°C 6
Synchronization pulse width TPW 2.2 2.8 µs 6
Error amplifier common-mode input voltage range VICM 0.5 3.6 V VICM range ensures parameters; functionality ensured for 3.6V < VICM < VREF + 0.4V, and –0.4V < VICM < 0.5V 7
Error amplifier offset voltage VIO -7 7 mV 7
Error amplifier input bias current IBIAS -1 1 µA 7
Error amplifier high-level output voltage EAHIGH 3.9 V V(EA+) – V(EA–) = 500mV, IEAOUT = –0.5mA 7
Error amplifier low-level output voltage EALOW 0.35 V V(EA+) – V(EA–) = –500mV, IEAOUT = 0.5mA 7
Error amplifier source current ISOURCE -8 -0.5 mA 7
Error amplifier sink current ISINK 2.7 5.75 mA 7
CS pin cycle-by-cycle threshold VCS_LIM 1.94 2.06 V 7
Discharge current to set cycle-by-cycle current limit duration IDS 15 25 µA VCS = 2.5V, VVSS = 4V 7
Hiccup OFF time threshold VHCC 3.2 4.2 V 7
Discharge current to set hiccup mode OFF time IHCC 1.9 3.2 µA 7
Soft-start charge current ISS 20 30 µA VSS = 0V 7
Shutdown, restart threshold VSS_STD 0.25 0.7 V 7
Pullup threshold VSS_PU 3.3 4.3 V 7
Clamp voltage VSS_CL 4.2 4.95 V 7
Junction-to-ambient thermal resistance (PW, 24 pins) RθJA 93.3 °C/W 5
Junction-to-case (top) thermal resistance (PW, 24 pins) RθJC(top) 24.2 °C/W 5
Junction-to-board thermal resistance (PW, 24 pins) RθJB 47.9 °C/W 5
Junction-to-top characterization parameter (PW, 24 pins) ψJT 0.7 °C/W 5
Junction-to-board characterization parameter (PW, 24 pins) ψJB 47.4 °C/W 5

CAD (KiCad official)

  • Symbol: UCC28950PW
  • Footprint: Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm
  • 3D model: TSSOP-24 (KiCad packages3D, STEP)
  • 3D model files: ucc28950pw-etched.step / ucc28950pw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ucc28950pw.step / ucc28950pw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (80 pp, sha256 a765d09f25ef27f8, retrieved 2026-10-08, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF