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UCC28251PWR

Texas Instruments · AC-DC Controllers & Regulators · TSSOP-20

UCC28251PWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VSENSE input Output voltage sensing input for pre-bias control, with input range 0 to 3.3 V.
2 RT input Oscillator frequency set resistor to ground or synchronous clock input, with RT resistor range 12.5 to 200 kΩ.
3 RAMP/CS input PWM ramp input for voltage mode control or current sense input for current mode control, with voltage range 0 to 2.3 V.
4 ILIM input Current sense input for cycle-by-cycle over-current protection, terminating the OUTA/OUTB pulse when above 0.5 V.
5 EN input Device enable and disable input; pull to VREF if the enable function is not used.
6 OVP/OTP input Over-voltage and over-temperature protection input that causes a fault shutdown when above 0.7 V.
7 VREF power_out 3.3-V reference output, requiring a 0.47 to 2.20 µF bypass capacitor.
8 REF/EA+ input Error amplifier non-inverting input with common mode range 0 to 3.0 V.
9 FB/EA- input Error amplifier inverting input with common mode range 0 to 3.0 V.
10 COMP bidirectional Error amplifier output, with 6.5 mA typical sink current and 4.5 mA typical source current.
11 GND power_in Ground.
12 VDD power_in Bias supply input, 4.7 to 17 V recommended with at least 1 µF bypass capacitor.
13 SRB output 0.2-A sink/source synchronous rectifier output.
14 SRA output 0.2-A sink/source synchronous rectifier output.
15 OUTB output 0.2-A sink/source primary switching output.
16 OUTA output 0.2-A sink/source primary switching output.
17 HICC input Cycle-by-cycle current limit time delay and hiccup time setting pin, programmed by a capacitor to ground.
18 PS input Primary off to synchronous rectifier on dead-time set, with resistor range 5 to 250 kΩ.
19 SP input Synchronous rectifier off to primary on dead-time set, with resistor range 5 to 250 kΩ.
20 SS bidirectional Soft-start programming pin with 28 µA typical charge current, clamped at 3.6 V typical.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20
Category Power Management ICs
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage range VDD 4.7 12 17 V 5
Operating junction temperature range TJ -40 150 °C 5
Supply bypass capacitor CVDD 1 µF 5
VREF bypass capacitor 0.47 2.2 µF 5
Error amplifier input common mode range 0 3 V REF/EA+, FB/EA- 5
VSENSE input voltage range 0 3.3 V 5
RT resistor range 12.5 200 kΩ 5
PS, SP resistor range 5 250 kΩ 5
RAMP/CS voltage range 0 2.3 V 5
Input supply voltage VDD -0.3 20 V 5
OUTA, OUTB, SRA and SRB voltage -0.3 V max VDD + 0.3 V 5
COMP voltage -0.3 V max VREF + 0.3 V 5
Input voltages on SS and EN -0.3 5.5 V 5
Input voltages on RT, PS, SP, ILIM, OVP, HICC, VSENSE, EA+, EA- -0.3 3.6 V 5
Input voltage on RAMP/CS -0.3 4.3 V 5
Output voltage on VREF -0.3 3.6 V 5
Lead temperature 300 °C soldering 10 sec, PW package 5
Storage temperature Tstg -65 150 °C 5
ESD HBM V(ESD) -3000 3000 V Human-body model, ANSI/ESDA/JEDEC JS-001 5
ESD CDM V(ESD) -2000 2000 V Charged-device model, JESD22-C101 5
Junction-to-ambient thermal resistance RθJA 60.3 °C/W PW, with hot spot (39.3 without hot spot) 6
Junction-to-case (top) thermal resistance RθJC(top) 31.5 °C/W PW 6
Junction-to-board thermal resistance RθJB 55.8 °C/W PW 6
Startup current IDD(off) 150 275 µA VDD = 3.6 V 6
Operating supply current IDD 1.2 2 2.5 mA 100-pF capacitor on OUTA, OUTB, SRA and SRB 6
Standby current IDD(dis) 250 425 600 µA EN = 0 V 6
Start threshold VUVLOR 4 4.3 4.65 V 6
Minimum operating voltage after start VUVLOF 3.8 4.1 4.4 V 6
UVLO Hysteresis 0.15 0.2 0.25 V 6
Soft-start charge current ISS 26 28 30 µA VSS = 0 V 6
Soft-start clamp voltage VSS(max) 3.3 3.6 4 V 6
Enable trigger threshold 1.5 2 2.25 V 6
Enable minimum pulse width for pulse enable 3.2 µs 6
High-level COMP voltage 2.8 3 V 6
Low-level COMP voltage 0.3 0.4 V 6
Error amplifier input offset -16.2 18 mV 6
Open loop gain 70 100 dB 6
COMP sink current ICOMP(snk) 3 6.5 9 mA 6
COMP source current ICOMP(src) 2 4.5 8 mA 6
Nominal switching frequency FSW(nom) 90 98 106 kHz RT/SYNC = 75 kΩ, RSP = 20 kΩ 7
Minimum switching frequency set by external sync FSW(min_sync) 42 kHz fRT/SYNC = 50 kHz 7
Maximum switching frequency set by external sync FSW(max_sync) 945 kHz fRT/SYNC = 2.5 MHz 7
External synchronization signal high 1 V 7
External synchronization signal low 0.2 V 7
VREF output voltage VVREF 3.17 3.25 3.33 V VDD = from 7 V to 17 V, IVREF = 2 mA 7
VREF short circuit current 12 25 40 mA VREF = 3 V, TJ = 25 °C 7
ILIM cycle-by-cycle threshold VILIM 0.497 0.505 0.513 V 7
Propagation delay ILIM to OUTA and OUTB TPDILIM 12.3 25 38.7 ns Exclude leading edge blanking (UCC28251PW) 7
Leading edge blanking TBLANK 35 60 90 ns 7
Current limit shutdown delay timing program current 55 75 95 µA Measured at HICC pin 7
Hiccup timing program current 2 2.7 3.5 µA Measured at HICC pin 7
Current limit shutdown delay timer threshold at HICC VHICC_SD 0.55 0.6 0.65 V 7
HICC pull-up threshold VHICC_PU 2.25 2.4 2.5 V 7
Hiccup restart threshold VHICC_RST 0.25 0.3 0.35 V 7
RAMP/CS clamp voltage VCS(max) 3.5 4 4.5 V 10-V ramp charging voltage source with 40-kΩ current limiting resistor 7
OVP internal reference VOVP 0.66 0.7 0.74 V 8
OVP internal current IOVP 6 8.5 11 µA 8
Primary output source resistance RSRC 12 20 35 Ω IOUT = 20 mA 8
Primary output sink resistance RSNK 4 12 30 Ω IOUT = 20 mA 8
Primary output rise/fall time 8 ns CLOAD = 100 pF 8
SR output rise/fall time 8 ns CLOAD = 100 pF 8
SR output source resistance RSRC 12 20 35 Ω IOUT = 20 mA, VDD = 12 V 8
SR output source resistance RSRC 15 25 45 Ω IOUT = 20 mA, VDD = 5 V 8
SR output sink resistance RSNK 4 12 30 Ω IOUT = 20 mA, VDD = 12 V 8

CAD (KiCad official)

  • Symbol: UCC28251PWR
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: ucc28251pwr-etched.step / ucc28251pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ucc28251pwr.step / ucc28251pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (58 pp, sha256 67008ba993940d0e, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF