# UCC2813QDR-5Q1

**Texas Instruments** · AC-DC Controllers And Regulators · SOIC-8

UCC2813QDR-5Q1 from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | COMP | output | COMP is the error amplifier output and the input to the PWM comparator, and feedback loop compensation is applied between this pin and FB. |
| 2 | FB | input | FB is the inverting input of the error amplifier, and the datasheet recommends keeping its trace short and its stray capacitance small for best stability. |
| 3 | CS | input | CS is the input to the current sense comparators (PWM and over-current), and it should be connected directly to the MOSFET source sense resistor, with the internal 100 ns leading-edge blanking applied. |
| 4 | RC | input | RC is the oscillator timing pin, where an external resistor (from REF) and capacitor (to GND) program the switching frequency and maximum duty cycle; recommended RT is 10 kΩ to 200 kΩ and CT is 100 pF to 1000 pF, and RT must never be below 10 kΩ. |
| 5 | GND | power_in | GND is the reference and power ground for all functions of the device and should be kept separate from the high-current gate driver return path. |
| 6 | OUT | output | OUT is the high-current power driver output for driving a power MOSFET gate, rated for peak current up to ±1 A, and it is actively held low when VCC is below the UVLO threshold. |
| 7 | VCC | power_in | VCC is the device bias supply input, connected to the voltage source through a current-limiting resistor, with a 12 V absolute maximum rating (internal zener clamps at about 13.5 V) and a 0.1 µF ceramic bypass capacitor placed close to the pin. |
| 8 | REF | output | REF is the voltage reference output for the error amplifier and other internal functions, supplying up to 5 mA (output short-circuit current 5 mA to -35 mA range per spec), and it requires a ceramic bypass capacitor of at least 0.1 µF to GND. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |

## CAD (KiCad official)

- Symbol: `UCC2813QDR-5Q1`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `ucc2813qdr-5q1-etched.step` / `ucc2813qdr-5q1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ucc2813qdr-5q1.step` / `ucc2813qdr-5q1.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/ucc2813-0-q1) (47 pp, sha256 `114dd59e68535e9e`, retrieved 2026-10-10, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ucc2813qdr-5q1-datasheet.pdf)